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CY7C1049CV33-15ZE中文资料

CY7C1049CV33-15ZE中文资料

4-Mbit (512K x 8) Static RAM

CY7C1049CV33

Cypress Semiconductor Corporation •3901North First Street •

San Jose ,CA 95134•408-943-2600

Document #: 38-05006 Rev. *C

Revised July 19, 2004

Features

•Temperature Ranges —Commercial: 0°C to 70°C —Industrial: –40°C to 85°C —Automotive: –40°C to 125°C •High speed —t AA = 10 ns •Low active power —324 mW (max.)•2.0V data retention

•Automatic power-down when deselected •TTL-compatible inputs and outputs

Easy memory expansion with CE and OE features

Functional Description [1]

The CY7C1049CV33 is a high-performance CMOS Static RAM organized as 524,288 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers.Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O 0 through I/O 7) is then written into the location specified on the address pins (A 0 through A 18).

Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O 0 through I/O 7) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a Write operation (CE LOW, and WE LOW).

The CY7C1049CV33 is available in standard 400-mil-wide 36-pin SOJ package and 44-pin TSOP II package with center power and ground (revolutionary) pinout.

Notes:

1.For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at http://www.wendangku.net/doc/f2d5286658fafab069dc02d6.html .

1415Logic Block Diagram Pin Configuration

A 1A 2A 3A 4A 5A 6A 7A 8COLUMN DECODER

R O W D E C O D E R

S E N S E A M P S

INPUT BUFFER

POWER DOWN

WE OE

I/O 0

I/O 1

I/O 2

I/O 3512K x 8ARRAY

I/O 7

I/O 6I/O 5

I/O 4A 0A 11A 13A 12A CE A A 16A 1712345678910111423242827262529323130Top View

SOJ 12133336353416152122GND A 1A 2A 3A 4A 5A 6A 7A 8WE V CC A 18A 15A 12A 14I/O 5I/O 4A 9A 0I/O 0I/O 1I/O 2OE A 17A 16A 13CE A 9A 18

18

1719

20GND I/O 7I/O 3I/O 6V CC A 10A 11NC NC

A 10

A 612345678910111431323635343337403938Top View

TSOP II 12134144434216152930V CC A 7A 8A 9NC NC

NC NC A 18V SS NC A 15A 0A 3I/O 0A 4CE A 17A 12A 1A 218172019I/O 12728252622

2123

24NC

V SS WE I/O 2I/O 3A 5NC A 16V CC OE I/O 7I/O 6I/O 5I/O 4A 14A 13A 11A 10NC NC NC 元器件交易网http://www.wendangku.net/doc/f2d5286658fafab069dc02d6.html