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博通BCM43362-wifi 资料

博通BCM43362-wifi 资料
博通BCM43362-wifi 资料

Single-Chip IEEE 802.11? b/g/n MAC/Baseband/Radio + SDIO

Figure 1: BCM43362 System Block Diagram

GENERAL DESCRIPTION

FEATURES

The Broadcom? BCM43362 single-chip device

provides the highest level of integration for mobile and handheld wireless systems, featuring integrated IEEE 802.11? b/g and handheld device class IEEE 802.11n. It includes a 2.4 GHz WLAN CMOS power amplifier (PA) that meets the output power requirements of most handheld systems. An optional external low-noise amplifier (LNA) and external PA are also supported.

Along with the integrated power amplifier, the BCM43362 also includes integrated transmit and receive baluns, further reducing the overall solution cost.

Host interface options include SDIO v2.0 that can operate in 4b or 1b modes, and a generic gSPI mode.Utilizing advanced design techniques and process technology to reduce active and idle power, the BCM43362 is designed to address the needs of highly mobile devices that require minimal power

consumption and compact size. It includes a power management unit that simplifies the system power topology and allows for operation directly from a rechargeable mobile platform battery while maximizing battery life.

?Single-band 2.4 GHz IEEE 802.11 b/g/n

?Integrated WLAN CMOS power amplifier with internal power detector and closed-loop power control

?Internal fractional-N PLL enables the use of a wide range of reference clock frequencies

?Supports IEEE 802.15.2 external 3-wire and 4-wire coexistence schemes to optimize bandwidth utilization with other co-located wireless

technologies such as Bluetooth, GPS, WiMax, or UWB.

?Supports standard interfaces SDIO v2.0 (50 MHz, 4-bit and 1-bit) and generic SPI (up to 50 MHz)?Integrated ARM Cortex?-M3 CPU with on-chip memory enables running IEEE 802.11 firmware

that can be field-upgraded with future features.?Supports WMM?, WMM-PS, and Wi-Fi Voice Personal (upgradable to Voice Enterprise in the future)?Security:

–Hardware WAPI acceleration engine –AES and TKIP in hardware for faster data encryption and IEEE 802.11i compatibility –WPA?- and WPA2?- (Personal) support for powerful encryption and authentication ?Programmable dynamic power management ?Supports battery voltage range from 2.3V to 5.5V supplies with internal switching regulator ? 1 kbit One-Time Programmable (OTP) memory for storing board parameters

?69-bump WLBGA

(4.52 mm x 2.92 mm, 0.4 mm pitch)

Broadcom?, the pulse logo, Connecting everything?, and the Connecting everything logo are among the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/or the EU. Any other trademarks or trade names mentioned are the property of their respective owners.This data sheet (including, without limitation, the Broadcom component(s) identified herein) is not designed, intended, or certified for use in any military, nuclear, medical, mass transportation, aviation, navigations, pollution control, hazardous substances management, or other high-risk application. BROADCOM PROVIDES THIS DATA SHEET “AS-IS,” WITHOUT WARRANTY OF ANY KIND. BROADCOM DISCLAIMS ALL WARRANTIES,

EXPRESSED AND IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF Broadcom Corporation 5300 California Avenue Irvine, CA 92617? 2011 by Broadcom Corporation

All rights reserved Printed in the U.S.A.

Revision History

Revision Date Change Description

43362-DS101-R

02/17/11

Updated:

?LPO clock to LPO sleep clock throughout the document.?Figure 3: “Power Topology,” on page 13.?“TCXO” on page 18.

?Table 2: “Crystal Oscillator and External Clock Requirements and Performance,” on page 19.

?“External 32.768 kHz Low-Power Oscillator” on page 20.

?Table 3: “External 32.768 kHz Low-Power Oscillator Specifications,” on page 20.

?Table 6: “gSPI Registers,” on page 29.

?Table 8: “WLBGA Signal Descriptions,” on page 47.

?Table 9: “BCM43362 During Reset and After Reset or During Sleep,” on page 53.

?Table 12: “Environmental Ratings,” on page 57.?Table 13: “ESD Specifications,” on page 57.

?Table 14: “Recommended Operating Conditions and DC Characteristics,” on page 58.

?Table 16: “WLAN 2.4 GHz Receiver Performance Specifications,” on page 60.?Table 17: “WLAN 2.4 GHz Transmitter Performance Specifications,” on page 63.

?Table 18: “General Spurious Emissions Specifications,” on page 65.?Table 19: “Core Buck Regulator,” on page 66.?Table 20: “3.3V LDO (LDO3P3),” on page 69.?Table 21: “CLDO,” on page 70.?Table 22: “LNLDO1,” on page 71.?“gSPI Signal Timing” on page 76.43362-DS100-R 07/15/10

Initial release

Table of Contents

About This Document (8)

Purpose and Audience (8)

Acronyms and Abbreviations (8)

Document Conventions (8)

References (9)

Technical Support (9)

Section 1: BCM43362 Overview (10)

Overview (10)

Standards Compliance (11)

Section 2: Power Supplies and Power Management (12)

WLAN Power Management (12)

Power Supply Topology (13)

Voltage Regulators (14)

PMU Sequencing (14)

Low-Power Shutdown (15)

CBUCK Regulator Features (15)

Section 3: Frequency References (17)

Crystal Interface and Clock Generation (17)

TCXO (18)

External 32.768 kHz Low-Power Oscillator (20)

Section 4: WLAN System Interfaces (21)

SDIO v2.0 (21)

SDIO Pin Descriptions (21)

Generic SPI Mode (23)

SPI Protocol (23)

Command Structure (26)

Write (26)

Write/Read (26)

Read (26)

Status (27)

gSPI Host-Device Handshake (29)

Boot-Up Sequence (29)

External Coexistence Interface (32)

Section 5: Wireless LAN MAC and PHY (33)

MAC Features (33)

MAC Description (33)

PSM (34)

WEP (35)

TXE (35)

RXE (35)

IFS (36)

TSF (36)

NAV (36)

MAC-PHY Interface (36)

PHY Description (37)

PHY Features (37)

Section 6: WLAN Radio Subsystem (40)

Receive Path (41)

Transmit Path (41)

Calibration (41)

Section 7: CPU and Global Functions (42)

WLAN CPU and Memory Subsystem (42)

One-Time Programmable Memory (42)

GPIO Interface (43)

JTAG Interface (43)

UART Interface (43)

Section 8: WLAN Software Architecture (44)

Host Software Architecture (44)

Device Software Architecture (44)

Remote Downloader (45)

Wireless Configuration Utility (45)

Section 9: Pinout and Signal Descriptions (46)

Signal Assignments (46)

WLAN GPIO Signals and Strapping Options (55)

Section 10: DC Characteristics (56)

Absolute Maximum Ratings (56)

Environmental Ratings (57)

Electrostatic Discharge Specifications (57)

Recommended Operating Conditions and DC Characteristics (58)

Section 11: WLAN RF Specifications (59)

2.4 GHz Band General RF Specifications (60)

WLAN 2.4 GHz Receiver Performance Specifications (60)

WLAN 2.4 GHz Transmitter Performance Specifications (63)

General Spurious Emissions Specifications (65)

Section 12: Internal Regulator Electrical Specifications (66)

Core Buck Regulator (66)

3.3V LDO (LDO3P3) (69)

CLDO (70)

LNLDO1 (71)

Section 13: System Power Consumption (72)

Section 14: Interface Timing and AC Characteristics (73)

SDIO Default Mode Timing (73)

SDIO High-Speed Mode Timing (75)

gSPI Signal Timing (76)

JTAG Timing (77)

Section 15: Package Information (78)

Package Thermal Characteristics (78)

Junction Temperature Estimation and PSI Versus Theta jc (78)

Section 16: Mechanical Information (79)

Section 17: Ordering Information (80)

Figure 1: BCM43362 System Block Diagram (1)

Figure 2: BCM43362 Block Diagram (10)

Figure 3: Power Topology (13)

Figure 4: Recommended Oscillator Configuration (17)

Figure 5: Recommended Circuit to Use with an External Dedicated TCXO (18)

Figure 6: Recommended Circuit to Use with an External Shared TCXO (18)

Figure 7: Signal Connections to SDIO Host (SD 4-Bit Mode) (21)

Figure 8: Signal Connections to SDIO Host (SD 1-Bit Mode) (22)

Figure 9: Signal Connections to SDIO Host (gSPI Mode) (23)

Figure 10: gSPI Write Protocol (24)

Figure 11: gSPI Read Protocol (25)

Figure 12: gSPI Command Structure (26)

Figure 13: gSPI Signal Timing Without Status (27)

Figure 14: gSPI Signal Timing with Status (Response Delay = 0) (28)

Figure 15: WLAN Boot-Up Sequence (31)

Figure 16: 4-Wire Coexistence Wiring (32)

Figure 17: WLAN MAC Architecture (34)

Figure 18: WLAN PHY Block Diagram (38)

Figure 19: STBC Receive Block Diagram (39)

Figure 20: Radio Functional Block Diagram (40)

Figure 21: WLAN Software Architecture (45)

Figure 22: 69-Ball WLBGA Ball Map (46)

Figure 23: RF Port Location (59)

Figure 24: CBUCK Efficiency (68)

Figure 25: SDIO Bus Timing (Default Mode) (73)

Figure 26: SDIO Bus Timing (High-Speed Mode) (75)

Figure 27: gSPI Timing (76)

Figure 28: 69-Ball WLBGA Mechanical Information (79)

Table 1: CBUCK Operating Mode Selection (16)

Table 2: Crystal Oscillator and External Clock Requirements and Performance (19)

Table 3: External 32.768 kHz Low-Power Oscillator Specifications (20)

Table 4: SDIO Pin Descriptions (21)

Table 5: gSPI Status Field Details (28)

Table 6: gSPI Registers (29)

Table 7: Coexistence Signals (32)

Table 8: WLBGA Signal Descriptions (47)

Table 9: BCM43362 During Reset and After Reset or During Sleep (53)

Table 10: GPIO Functions and Strapping Options (55)

Table 11: Absolute Maximum Ratings (56)

Table 12: Environmental Ratings (57)

Table 13: ESD Specifications (57)

Table 14: Recommended Operating Conditions and DC Characteristics (58)

Table 15: 2.4 GHz Band General RF Specifications (60)

Table 16: WLAN 2.4 GHz Receiver Performance Specifications (60)

Table 17: WLAN 2.4 GHz Transmitter Performance Specifications (63)

Table 18: General Spurious Emissions Specifications (65)

Table 19: Core Buck Regulator (66)

Table 20: 3.3V LDO (LDO3P3) (69)

Table 21: CLDO (70)

Table 22: LNLDO1 (71)

Table 23: System Power Consumption (72)

Table 24: SDIO Bus Timing Parameters (Default Mode) (74)

Table 25: SDIO Bus Timing Parameters (High-Speed Mode) (75)

Table 26: gSPI Timing Parameters (76)

Table 27: JTAG Timing Characteristics (77)

Table 28: Package Thermal Characteristics (78)

About This Document BCM43362 Advance Data Sheet

About This Document

Purpose and Audience

This document provides engineering design information for the BCM43362, a single chip with an integrated 2.4 GHz RF transceiver, MAC, and baseband processor that fully supports the IEEE 802.11? b/g/n standards. The information provided is intended for hardware design engineers who will be incorporating the BCM43362 into their designs.

Acronyms and Abbreviations

In most cases, acronyms and abbreviations are defined on first use.

For a comprehensive list of acronyms and other terms used in Broadcom documents, go to:

https://www.wendangku.net/doc/fb7175785.html,/press/glossary.php.

Document Conventions

The following conventions may be used in this document:

Convention Description

Bold User input and actions: for example, type exit, click OK, press Alt+C

Monospace Code: #include

HTML:

Command line commands and parameters: wl [-l]

< >Placeholders for required elements: enter your or wl

[ ]Indicates optional command-line parameters: wl [-l]

Indicates bit and byte ranges (inclusive): [0:3] or [7:0]

Technical Support

BCM43362 Advance Data Sheet References

The references in this section may be used in conjunction with this document.

For Broadcom documents, replace the “xx” in the document number with the largest number available in the repository to ensure that you have the most current version of the document.Technical Support

Broadcom provides customer access to a wide range of information, including technical documentation, schematic diagrams, product bill of materials, PCB layout information, and software updates through its

customer support portal (https://https://www.wendangku.net/doc/fb7175785.html, ). For a CSP account, contact your Sales or Engineering support representative.

In addition, Broadcom provides other product support through its Downloads & Support site (https://www.wendangku.net/doc/fb7175785.html,/support/

).

Note: Broadcom provides customer access to technical documentation and software through its Customer Support Portal (CSP) and Downloads & Support site (see Technical Support ).

Document (or Item) Name Number

Source

Broadcom Items

[1]BCM43362 reference board schematics

Broadcom Representative

BCM43362 Advance Data Sheet

BCM43362 Overview Section 1: BCM43362 Overview Overview

The Broadcom? BCM43362 provides the highest level of integration for a mobile or handheld wireless system, with integrated IEEE 802.11 b/g/n. It provides a small form-factor solution with minimal external components to drive down cost for mass volumes and allows for handheld device flexibility in size, form, and function. The BCM43362 is designed to address the needs of highly mobile devices that require minimal power consumption and reliable operation.

Figure 2 shows the interconnect of all the major physical blocks in the BCM43362 and their associated external interfaces, which are described in greater detail in the following sections.

Figure 2: BCM43362 Block Diagram

Standards Compliance BCM43362 Advance Data Sheet

Standards Compliance

The BCM43362 supports the following standards:

?IEEE 802.11n

?802.11b

?802.11g

?802.11d

?802.11h

?802.11i

?802.11j

The BCM43362 will support the following future drafts/standards:

?802.11w —S ecure Management Frames

?802.11 Extensions:

?WMM?

?802.11i MAC Enhancements

?802.11r Fast Roaming Support (between APs)

?802.11k Radio Resource Measurement

?Security:

?WEP

?WAPI

?WPA?Personal

?WPA2?Personal

?AES (Hardware Accelerator)

?TKIP (HW Accelerator)

?CKIP (SW Support)

?QOS Protocols:

?WMM

?WWM-PS (U-APSD)

?WWM-SA

?Proprietary Protocols:

?CCXv2

?CCXv3

?CCXv4

?CCXv5

?WFAEC

?Coexistence Interfaces:

?Supports IEEE 802.15.2 external three-wire coexistence scheme to support additional wireless technologies, such as GPS, WiMax, or UWB.

Power Supplies and Power Management BCM43362 Advance Data Sheet

Section 2: Power Supplies and Power

Management

WLAN Power Management

The BCM43362 has been designed with the stringent power consumption requirements of mobile devices in mind. All areas of the chip design are optimized to minimize power consumption. Silicon processes and cell libraries were chosen to reduce leakage current and supply voltages. Additionally, the BCM43362 integrated RAM is a low-leakage memory with dynamic clock control. The dominant supply current consumed by the RAM is leakage current only.

Additionally, the BCM43362 includes an advanced WLAN power management unit (PMU) sequencer. The PMU sequencer provides significant power savings by putting the BCM43362 into various power management states appropriate to the current environment and activities that are being performed. The power management unit enables and disables internal regulators, switches, and other blocks based on a computation of the required resources and a table that describes the relationship between resources and the time needed to enable and disable them. Power-up sequences are fully programmable. Configurable, free-running counters, which run on the 32.768 kHz low-power oscillator (LPO) sleep clock in the PMU sequencer, are used to turn individual regulators and power switches on and off. Clock speeds are dynamically changed, or gated off, as appropriate for the current mode. Slower clock speeds are used wherever possible.

The BCM43362 power states are described as follows:

?Active mode —A ll components in the BCM43362 are powered up and fully functional with active carrier sensing and frame transmission and receiving. All required regulators are enabled and put in the most efficient mode (PWM or Burst) based on the load current. Clock speeds are dynamically adjusted by the PMU sequencer.

?Sleep mode —T he radio, AFE, PLLs, and the crystal oscillator are powered down. The rest of the BCM43362 remains powered up in an IDLE state. All main clocks are shut down. The 32.768-kHz LPO sleep clock is available only for the PMU sequencer. This condition is necessary to allow the PMU sequencer to wake up the chip and transition to Active mode. In Sleep mode, the primary power consumed is due to leakage current.

?Power-down modes —T he BCM43362 has a full power-down mode and a low-power shutdown mode. A full power-down occurs when there is no VIO voltage, and WL_RST_N and EXT_SMPRS_REQ are low. A low-power shutdown occurs when VIO is present, and WL_RST_N and EXT_SMPRS_REQ are low. In low-power shutdown, only the band gap and LDO3P3 are on. Both power-down modes are exited when the host asserts either WL_RST_N or EXT_SMPS_REQ high.

?External mode —I n this mode, the following are true:

–The assertion of EXT_SMPS_REQ turns only the Core Buck (CBUCK) regulator on.

–The WLAN is in reset (WL_RST_N = low).

–The state of LDO3P3 and the band gap are dependent on VBAT and VIO.

Power Supply Topology BCM43362 Advance Data Sheet

Power Supply Topology

The BCM43362 contains a Power Management Unit (PMU), a buck-mode switching regulator, and three low noise LDOs. These integrated regulators simplify power supply design in WLAN embedded designs. All regulator inputs and outputs are brought out to pins on the BCM43362, providing system designers with the flexibility to choose which of the BCM43362's integrated regulators to use. One option is to supply the PMU from a single, variable power supply, VBAT, which can range from 2.3V to 5.5V. Using this option, all of the required voltages are provided by BCM43362 regulators except for a low current rail, VIO, which must be provided by the host to power the I/O signal buffers when the chip is out of reset.

Alternately, if specific rails such as 3.3V, 1.8V, and 1.2V already exist in the system, appropriate regulators in the BCM43362 can be bypassed, thereby reducing the cost and board space associated with external regulator components such as inductors and large capacitors.

The CBUCK and CLDO get powered whenever the reset signal is deasserted. The CBUCK regulator can be turned ON by asserting EXT_SMPS_REQ high. Asserting EXT_PWM_REQ high will set CBUCK to PWM mode. Driving EXT_PWM_REQ low will put CBUCK in Burst mode. Optionally, LNLDO may also be powered. All regulators are powered down only when the reset signal is asserted.

Figure 3: Power Topology

Voltage Regulators BCM43362 Advance Data Sheet

Voltage Regulators

All BCM43362 regulator output voltages are PMU programmable and have the following nominal capabilities. The currents listed below indicate regulator capabilities. See “System Power Consumption” on page 72 for the actual expected loads.

?Core Buck switching regulator (CBUCK): 2.3–5.5V input, nominal 1.5V output (up to 500 mA).

?LDO3P3: 2.3–5.5V input, nominal 3.3V output (up to 40 mA)

?CLDO (for the core): 1.45–2.0V input, nominal 1.2V output (up to 150 mA)

?Low-noise LNLDO1: 1.45–2.0V input, nominal 1.2V output (up to 150 mA)

See “Internal Regulator Electrical Specifications” on page 66 for full regulator specifications.

PMU Sequencing

The WLAN PMU sequencer is responsible for minimizing system power consumption. It enables and disables various system resources based on a computation of the required resources and a table that describes the relationship between resources and the time needed to enable and disable them. Resource requests come from several sources: clock requests from cores, the minimum resources defined in the ResourceMin register, and the resources requested by any active resource request timers. The PMU sequencer maps clock requests into a set of resources required to produce the requested clocks.

Each resource is in one of four states: enabled, disabled, transition_on, and transition_off. Each resource has a timer that contains 0 when the resource is enabled or disabled and a nonzero value in the transition states. The timer is loaded with the resource's time_on or time_off value when the PMU determines that the resource must be enabled or disabled. That timer decrements on each LPO sleep clock. When it reaches 0, the state changes from transition_off to disabled or transition_on to enabled. If the time_on value is 0, the resource can go immediately from disabled to enabled. Similarly, a time_off value of 0 indicates that the resource can go immediately from enabled to disabled. The terms enable sequence and disable sequence refer to either the immediate transition or the timer load-decrement sequence.

During each clock cycle, the PMU sequencer performs the following actions:

https://www.wendangku.net/doc/fb7175785.html,putes the required resource set based on requests and the resource dependency table.

2.Decrements all timers whose values are nonzero. If a timer reaches 0, the PMU clears the ResourcePending

bit for the resource and inverts the ResourceState bit.

https://www.wendangku.net/doc/fb7175785.html,pares the request with the current resource status and determines which resources must be enabled

or disabled.

4.Initiates a disable sequence for each resource that is enabled, no longer being requested, and has no

powered-up dependents.

5.Initiates an enable sequence for each resource that is disabled, is being requested, and has all of its

dependencies enabled.

BCM43362 Advance Data Sheet

Low-Power Shutdown

Low-Power Shutdown

The BCM43362 provides a low-power shutdown feature that allows the device to be turned off while the host, and any other device in the system, remain operational. When the WLAN is not needed, the WLAN core can be put in reset by deasserting WL_RST_N (logic hi). VDDIO_RF and VDDIO remain powered while VIO and VBAT are both present, allowing the BCM43362 to be effectively off while keeping the I/O pins powered. During a low-power shut-down state, provided VIO continues to be supplied to the BCM43362, most outputs are tristated and most inputs are disabled. Input voltages must remain within the limits defined for normal operation. This is done to prevent current paths or create loading on any digital signals in the system, enabling the BCM43362 to be a fully integrated embedded device that takes full advantage of the lowest power-saving modes.

Two signals on the BCM43362, the system clock input (OSCIN) and sleep clock input (EXT_SLEEP_CLK), are designed to be high-impedance inputs that do not load down the driving signal even if the BCM43362 does not have VDDIO power applied to it. When the BCM43362 is powered on from this state, it is the same as a normal power-up, and the device does not contain any information about its state from before it was powered down.

CBUCK Regulator Features

The CBUCK regulator has several features that help make the BCM43362 ideal for mobile devices. First, the regulator uses 3.2 MHz as its PWM switching frequency for Buck regulation. This high frequency allows the use of small passive components for the switcher's external circuit, thereby saving PCB space in the design. In addition, the CBUCK regulator has three modes of operation: PWM mode for low-ripple output and for fast transient response and extended load ranges, Burst Mode for lower currents, and Low Power Burst Mode for higher efficiency when the load current is very low (Low Power Burst mode is not available for external devices).

The CBUCK supports external SMPS request to allow flexibility of supplying 1.8V to BCM43362, BCM2076, and other external devices when EXT_SMPS_REQ is asserted high. It also supports low ripple PWM mode (7 mVpp typical) for noise-sensitive applications when EXT_PWM_REQ is asserted high. A 100 μs wait/settling time from the assertion of EXT_PWM_REQ high before increasing the load current allows the internal integrator precharging to complete. This is not a requirement, but is preferred.

CBUCK Regulator Features

BCM43362 Advance Data Sheet Table 1 lists the mode the CBUCK operates in (Burst or PWM), based on various external control signals and internal CBUCK mode register settings.

For detailed CBUCK performance specifications, see “Core Buck Regulator” on page 66.

Table 1: CBUCK Operating Mode Selection

WL_RST_L EXT_SMPS_REQ EXT_PWM_REQ Internal CBUCK Mode Required CBUCK Mode 00X X Off 010X BURST 011X

PWM 10X BURST BURST 10X PWM PWM 110BURST BURST 110PWM PWM 1

1

1

X

PWM

Frequency References

BCM43362 Advance Data Sheet Section 3: Frequency References

An external crystal is used for generating all radio frequencies and normal operation clocking. As an

alternative, an external frequency reference driven by a temperature-compensated crystal oscillator (TCXO) signal may be used. No software settings are required to differentiate between the two. In addition, a low-power oscillator (LPO) is provided for lower power mode timing.

Crystal Interface and Clock Generation

The BCM43362 can use an external crystal to provide a frequency reference. The recommended configuration for the crystal oscillator, including all external components, is shown in Figure 4. Consult the reference schematics for the latest configuration.

Figure 4: Recommended Oscillator Configuration

The BCM43362 uses a fractional-N synthesizer to generate the radio frequencies, clocks, and data/packet timing. This enables it to operate using numerous frequency references. This may either be an external source such as a TCXO or a crystal interfaced directly to the BCM43362.

The default frequency reference setting is a 26 MHz crystal or TCXO. The signal requirements and characteristics for the crystal interface are shown in Table 2 on page 19

.

Note: Although the fractional-N synthesizer can support many reference frequencies, frequencies other than the default require support to be added in the driver, plus additional extensive system testing. Contact Broadcom for further details.

TCXO

As an alternative to a crystal, an external precision TCXO can be used as the frequency reference, provided that it meets the Phase Noise requirements listed in Table 2 on page 19. When the clock is provided by an external TCXO, there are two possible connection methods, as shown in Figure 5 and Figure 6:

1.If the TCXO is dedicated to driving the BCM43362, it should be connected to the OSC_IN pin through an

external 1000 pF coupling capacitor, as shown in Figure 5. The internal clock buffer connected to this pin will be turned OFF when the BCM43362 goes into sleep mode. When the clock buffer turns ON and OFF, there will be a small impedance variation up to ±15%. Power must be supplied to the WRF_XTAL_VDD1P2 pin.

2.An alternative is to DC-couple the TCXO to the WRF_TCXO_IN pin, as shown in Figure 6. Use this method

when the same TCXO is shared with other devices and a change in the input impedance is not acceptable because it may cause a frequency shift that cannot be tolerated by the other device sharing the TCXO. This pin is connected to a clock buffer powered from WRF_TCXO_VDD3P3. If the power supply to this buffer is always on (even in sleep mode), the clock buffer is always on, thereby ensuring a constant input impedance in all states of the device. The maximum current drawn from WRF_TCXO_VDD3P3 is approximately 500 μA.

Figure 5: Recommended Circuit to Use with an External Dedicated TCXO

Figure 6: Recommended Circuit to Use with an External Shared TCXO

Table 2: Crystal Oscillator and External Clock Requirements and Performance

Parameter Conditions/Notes Crystal

External Frequency

Reference Min Typ

Max

Min

Typ

Max

Units Frequency – Between 12 MHz and 52 MHz a a.The frequency step size is approximately 80 Hz. The BCM43362 does not auto-detect the reference clock frequency; the frequency is specified in the software/NVRAM file.

Crystal load capacitance –

– 12 –

pF ESR

– – – 60

ΩInput Impedance (OSCIN)b

b.The internal clock buffer connected to this pin will be turned off when the BCM43362 goes into Sleep mode. When the clock buffer turns on and off, there will be a small impedance variation up to ±15%.

Resistive 30k 100k

– ΩCapacitive

– – 7.5pF Input Impedance (WRF_TCXO_IN)Resistive 30k 100k – ΩCapacitive

– – 4pF OSCIN input voltage AC-coupled analog signal 400 – 1200mV p-p OSCIN input low level DC-coupled digital signal 0 – 0.2V OSCIN input high level DC-coupled digital signal 1.0 – 1.36V WRF_TCXO_IN input voltage

DC-coupled analog signal c c.This input has an internal DC blocking capacitor, so do not include an external DC blocking capacitor.

400 – TCXO_ VDD d d.The maximum allowable voltage swing for the WRF_TCXO_IN input is equal to the WRF_TCX0_VDD3P3 supply voltage range, which is 1.7V to 3.3V.

mV p-p Frequency tolerance Initial + over temperature – –20 – 20

–20 – 20ppm Duty cycle 26 MHz clock 405060%

Phase Noise e, f (IEEE 802.11 b/g)e.For a clock reference other than 26 MHz, 20 × log10(f/26) dB should be added to the limits, where f = the reference clock frequency in MHz.

f.If the selected clock has a flat phase-noise response above 100 kHz, then it is acceptable to subtract 1 dB from all 1 kHz, 10 kHz, and 100 kHz values shown, and ignore the 1 MHz requirement.

26 MHz clock at 1 kHz offset – – – 119dBc/Hz 26 MHz clock at 10 kHz offset

– – – 129dBc/Hz 26 MHz clock at 100 kHz offset – – – 134dBc/Hz 26 MHz clock at 1 MHz offset

– – – 139dBc/Hz Phase Noise e, f (IEEE 802.11n, 2.4 GHz)

26 MHz clock at 1 kHz offset – – – 124dBc/Hz 26 MHz clock at 10 kHz offset – – – 134dBc/Hz 26 MHz clock at 100 kHz offset – – – 139dBc/Hz 26 MHz clock at 1 MHz offset

– 144

dBc/Hz

External 32.768 kHz Low-Power Oscillator BCM43362 Advance Data Sheet

External 32.768 kHz Low-Power Oscillator

The BCM43362 uses a secondary low-frequency sleep clock for low-power mode timing. Either the internal low-precision LPO or an external 32.768 kHz precision oscillator is required. The internal LPO frequency range is approximately 33 kHz ± 30% over process, voltage, and temperature, which is adequate for some applications. However, one trade-off caused by this wide LPO tolerance is a small current consumption increase during power save mode that is incurred by the need to wake up earlier to avoid missing beacons. Whenever possible, the preferred approach is to use a precision external 32.768 kHz clock that meets the

requirements listed in Table 3

.

Note: The BCM43362 will auto-detect the LPO clock. If it senses a clock on the EXT_SLEEP_CLK pin, it will use that clock. If it doesn't sense a clock, it will use its own internal LPO.

?To use the internal LPO: Tie EXT_SLEEP_CLK to ground. Do not leave this pin floating.

?To use an external LPO: Connect the external 32.768 kHz clock to EXT_SLEEP_CLK.

Table 3: External 32.768 kHz Low-Power Oscillator Specifications

Symbol Parameter Condition/Notes

Specification

Units Minimum Typical Maximum

Fr Frequency––32768–Hz Δf/fr Frequency tolerance At 25°C–30–+30ppm

–20°C

–30°C

Duty cycle––30–70% Vol Output low voltage–0–0.2V Voh Output high voltage–0.7 Vio–Vio V

Tr/Tf Rise and fall time–––100ns –Signal type Digital––––

–Clock jitter Integrated over 300 Hz to

15 kHz

–– 30ns –Input impedance Resistive10––MΩ

Capacitive–– 2pF –Input amplitude Fail safe, 3.3V digital I/O–– 3.63V

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通风能力核定

煤矿(井)通风能力核定报告煤矿名称:赤峰宝马矿业有限责任公司 矿长姓名:马玉财 煤炭生产许可证号:X0504010102 矿井通风能力核定结果:45万吨 赤峰宝马矿业有限责任公司编制

目录 第一章矿井基本概况......................................... 第一节矿井概况............................................. 一、井田位置及范围....................................... 二、矿井储量............................................. 三、矿井煤层赋存条件..................................... 四、矿井开采............................................. 第二节矿井通风情况......................................... 一、矿井通风方式......................................... 二、矿井瓦斯、煤尘、自然发火情况......................... 第二章矿井需要风量计算..................................... 一、风量计算................................... 二、矿井通风阻力计算............................. 三、矿井等积孔计算.................................... 第三章矿井通风能力计算.................................... 第四章矿井通风能力验证.................................... 一、通风网络验证........................................ 二、利用用风地点有效风量进行验证........................ 第五章通风能力核定结果....................................

矿井通风能力核定报告22

山西灵石昕益天悦煤业有限公司通风能力核定报告 二○一二年元月

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正常,无煤(岩)与瓦斯(二氧化碳)突出危险,无冲击地压现象。矿井水文地质条件简单。 2、通风方式和通风系统 本矿井采用中央分列式的通风方式,采用主斜井、副立井进风,回风立井回风,矿井采用抽出式通风方法,通风机型号为FBCDZ-No17,功率为2×75kW。局部通风采用机械式压入式通风,井下设置了完整的通风构筑物。 二、风井数目、位置、服务范围 本矿井共布置四个井筒,即主斜井、副斜井、副立井、回风立井。主斜井和副立井进风,副斜井未贯通,回风立井回风。四个井筒均位于工业场地内,服务于山西灵石昕益天悦煤业整合改扩建期间井田所有用风地点。 三、掘进工作面及硐室通风 掘进工作面采用机械压入式通风。井下硐室除变电所采用独立通风外,其余硐室均采用扩散通风。 四、矿井风量 山西灵石昕益天悦煤业有限公司经通风队实地测量其总入风量为2780m3/min,总回风量为2881m3/min。 第二节矿井需要风量计算 一、矿井需要风量计算原则 矿井需要风量,按下列要求分别计算,并采用其中最大值。 (1)按矿井下同时工作最多人数计算,每人每分钟供给风

生产能力核定标准说明

浅谈《煤矿生产能力核定标准》修改部分 1.增加的内容 一是对灾害严重的矿井产能予以限制。水文地质条件极复杂、矿井开采深度超过1000m或水平距离单翼超过5000m的煤矿,在核定矿井生产能力时取安全生产系数0.95;冲击地压矿井安全保障修正系数Kc按照冲击强度、频次和产量取0.70-0.95。 二是根据《防治煤与瓦斯突出规定》、《煤矿瓦斯抽采达标暂行规定》等,增加了瓦斯抽采达标生产能力核定章节(第九章)。煤矿瓦斯抽采达标生产能力核定按矿井瓦斯抽采系统能力、矿井实际瓦斯抽采量、矿井满足防突要求的预抽瓦斯量、矿井瓦斯抽采率分别核定,煤矿瓦斯抽采达标生产能力取上述核定结果最小值。另 三是增加了对冲击地压煤矿的核定要求。冲击地压矿井必须建立防冲责任体系,有防冲专职队伍,建立健全矿井和采掘工作面预测预报系统,具有完备的防治机具,安装具有吸能防冲功能的超前液压支架,配备职工个体防护用具,开展防冲研究,制定防冲规划并组织实施。 2.调整的内容: 一是修改完善了通风系统生产能力核定的内容(第八章),使其与《煤矿通风能力核定标准》(AQ1056-2008)等规定一致。 如:增加了扣除通风系统生产能力的几种情形。 (1)不符合规定的串联风、扩散通风等区域的采掘面应扣除产

量; (2)通风系统不合理、瓦斯超限区域的产量,应从矿井通风系统生产能力中扣除; (3)高瓦斯矿井、突出矿井没有专用回风巷的采区,没有形成全风压通风系统、没有独立完整通风系统的采区的产量,应从矿井通风系统生产能力中扣除 (4)矿井供风量不足时,应减少采煤或掘进工作面个数,计算矿井通风能力时,扣除该采掘工作面的产量。 二是拉大了划分档次(第五条)。提出两种档次划分方案。30万t/a以下矿井按标准设计档次划分;30万t/a至120万t/a矿井以5万t为档次;120万t/a至600万t/a矿井以10万t为档次;600万t/a至1000万t/a矿井以50万t为一档次;1000万t/a以上矿井以100万t为一档次;露天煤矿以100万t为一档次。 三是除对“三个煤量”提出要求外,对抽采达标煤量也提出要求。按规定需要抽采的,抽采必须达标并实现抽、掘、采平衡。 四是对采掘机电运输等系统部分做了适当修改完善。井下运输间隔时间增大了一倍。 五是排水能力核定中,年度吨煤涌水量取值,由“上一年度平均日产吨煤所需排出的(最大)涌水量,m3/t。”改为“近五年最大的年度平均日产吨煤所需排出的(最大)涌水量,m3/t。”以客观反映真实情况。 3.删除的内容:

煤矿生产能力核定报告书

XXX矿井 生产能力核定报告书 XXX设计院 二〇一四年十一月 丰城曲江煤炭开发有限责任公司曲江矿井 生产能力核定报告书 核定资质单位负责人: 核定资质单位项目负责人: 丰城矿务局 二〇一四年十一月 前言 煤矿生产能力核定标志着一个独立完整的煤炭生产系统正常的产出水平,是反映煤矿技术经济特征的基本指标。科学合理地核定煤矿生产能力,是加强煤矿生产能力管理的基础,是指导煤矿科学组织生产的重要依据。 丰城曲江煤炭开发有限责任公司曲江矿井(以下简称曲江矿井)于2003年建成投产,设计生产能力90万t/a,设计服务年限54.8a。2006年核定生产能力为90万t/a,后复核结果为81万t/a。

针对国家煤矿安监局2014年8月19日来曲江矿井检查提出的要求重新核定矿井生产能力的意见,现根据2014年6月30日国家安全监管总局、国家煤矿安监局、国家发展改革委和国家能源局下发的《关于印发煤矿生产能力管理办法和核定标准的通知》(安监总煤行〔2014〕61号),2014年10月至11月对曲江矿井生产能力进行了重新核定,并编制了本生产能力核定报告书。 本次矿井生产能力核定的主要内容是: 对矿井提升系统、井下排水系统、供电系统、井下运输系统、采掘工作面、通风系统、瓦斯抽采系统、地面生产系统及选煤厂的生产能力进行核定;对矿井压风、防灭火、防尘、通信、监测监控、人员定位及降温制冷系统能力进行核查;对矿井资源储量及服务年限进行核查;提出矿井存在的主要问题及建议。 在矿井生产能力核定过程中,核查人员严格按照《煤矿生产能力管理办法》及《煤矿生产能力核定标准》的要求进行核定,矿井各专业技术人员给予了积极配合,在此表示感谢! 目录 1 概述 1 1.1 生产能力核定必备条件 1 1.2 生产能力核定工作过程简述 1 1.3 生产能力核定的主要依据 2 1.4 核定主要系统(环节)及结果 2 1.5 最终确定矿井核定生产能力 2

2018年最新通风能力核定

山西右玉教场坪煤业有限公司矿井通风能力核定报告 2018年1月6日

2018年度矿井通风能力核定报告会审意见表 会审意见:

目录 第一章概述 (1) 第一节核定工作的简要过程 (1) 第二节核定依据的主要法律、法规、规范和技术标准 (1) 第三节最终确定的煤矿核定通风能力 (2) 第二章矿井基本概况 (2) 第一节矿井概况 (2) 第二节矿井生产现状 (2) 第三节通风系统情况 (3) 第三章煤矿需要风量计算 (5) 第一节矿井需要风量的计算原则 (5) 第二节矿井需要风量计算方法 (6) 第三节采煤工作面实际需要风量的计算 (6) 第四节掘进工作面实际需要风量的计算 (11) 第五节硐室实际需要风量的计算 (15) 第六节其它用风巷道实际需要风量的计算 (16) 第七节矿井总需风量的确定 (17)

第四章矿井通风能力计算 (18) 第一节计算公式 (18) 第二节参数选取 (18) 第三节能力计算 (19) 第五章矿井通风能力验证 (20) 第一节矿井通风动力验证 (20) 第二节矿井通风网络能力验证 (21) 第三节矿井用风地点有效风量验证 (22) 第四节矿井稀释瓦斯能力验证 (22) 第六章煤矿通风能力核定结果 (22) 第七章问题及建议 (23)

第一章概述 第一节核定工作的简要过程 根据中华人民共和国安全生产行业标准AQ1056-2008《煤矿通风能力核定标准》及《煤矿安全规程》(2016版)第139条“矿井每年安排采掘作业计划时必须核定矿井生产和通风能力,必须按实际供风量核定矿井产量,严禁超通风能力生产”的要求,落实“以风定产”的煤矿瓦斯治理措施,加强煤矿通风管理,指导煤矿科学组织生产,规范煤矿生产行为,有效促进煤矿提高通风装备水平,改善安全生产条件,我矿于2018年1月6日对通风能力进行了核定。 第二节核定依据的主要法律、法规、规范和技术标准 1、《煤矿安全规程》(2016版); 2、中华人民共和国安全生产行业标准AQ1056-2008《煤矿通风能力核定标准》; 3、中华人民共和国安全生产行业标准AQ1028-2006《煤矿井工开采通风技术条件》; 4、《煤炭工业矿井设计规范》(GB50215-2005); 5、矿井有关监测检验报告; 6、《煤矿生产能力管理办法和核定标准》; 7、MT/T440-2008《矿井通风阻力测定方法》; 8、《煤炭法》、《矿产资源法》、《安全生产法》、《矿山安全法》等有关

《矿井生产能力核定标准》

煤矿生产能力核定标准 第一章总则 第一条为科学核定煤矿生产能力,依据有关法律、法规和技术政策,制定本标准。 第二条核定煤矿生产能力,必须具备以下条件: (一)依法取得采矿许可证、安全生产许可证、煤炭生产许可 证 和营业执照; (二)有健全的生产、技术、安全管理机构及必备的专业技术人员; (三)有完善的生产、技术、安全管理制度; (四)各生产系统及安全监控系统运转正常。 第三条核定煤矿生产能力以万t/a 为计量单位,年工作日采取330d。 第四条核定煤矿生产能力应当逐项核定各生产系统(环节) 的能力,取其中最低能力为煤矿综合生产能力。同时核查采区回采率、煤炭资源可采储量和服务年限。 井工矿主要核定主井提升系统、副井提升系统、排水系统、供电系统、井下运输系统、采掘工作面、通风系统和地面生产系统的能力。矿井压风、灭尘、通讯系统和地面运输能力、高瓦斯矿井瓦斯抽排能力等作为参考依据,应当满足核定生产能力的需要 露天矿主要核定穿爆、采装、运输、排土等环节的能力。除尘、 防排水、供电、地面生产系统的能力作为参考依据,应当满足核定生产能力的需

要。 第五条核定煤矿生产能力档次划分标准为: (一)30万t/a以下煤矿以1万t为档次(即1、2万t/a ??…); (二)30 万t/a 至90 万t/a 煤矿以 3 万t 为档次(即33、36 万t/a .. ); (三)90万t/a至600万t/a煤矿以5万t为档次(即95、100 万t/a... ); (四)600万t/a以上的煤矿以10万t为档次(即610、620万 t/a .. )。 生产能力核定结果不在标准档次的,按就近下靠的原则确定。 第六条煤矿通风系统能力必须按实际供风量核定,井下各用 风 地点所需风量要符合规程规范要求。经省级煤炭行业管理部门批准的矿井年度通风能力,可作为核定生产能力的依据。 第七条核定煤矿生产能力所用参数,必须采集已公布或上报的生产技术指标、现场实测和合法检测机构的测试数据,经统计、分析、整理、修正,并进行 现场验证而确定。 第二章资源储量及服务年限核查 第八条煤矿资源储量核查内容及标准: (一)有依法认定的资源储量文件; (二)有上年度核实或检测的资源储量数据;

生产能力核定说明汇总

资料范本 本资料为word版本,可以直接编辑和打印,感谢您的下载 生产能力核定说明汇总 地点:__________________ 时间:__________________ 说明:本资料适用于约定双方经过谈判,协商而共同承认,共同遵守的责任与义务,仅供参考,文档可直接下载或修改,不需要的部分可直接删除,使用时请详细阅读内容

目录 第一章概述 (1) 第一节核定工作的简要过程 (1) 第二节核定依据的主要法律、法规、规范和技术标准 (3) 第三节核定主要系统环节及结果 (3) 第四节最终确定的煤矿核定生产能力 (4) 第二章煤矿基本概况 (4) 第一节自然属性 (4) 第二节矿井建设情况 (31) 第三节煤矿生产现状 (33) 第三章煤矿生产能力核查计算 (36) 第一节资源储量核查 (36) 第二节主井提升系统能力核定 (41) 第三节副井提升系统能力核定 (44) 第四节井下排水系统能力核定 (47) 第五节供电系统能力核定 (51) 第六节井下运输系统能力核定 (54) 第七节采掘工作面能力核定 (57) 第八节通风系统能力核定 (64) 第九节地面生产系统能力核定 (97) 第十节压风、灭尘、瓦斯抽排、通讯等系统核查情况 (101) 第十一节安全程度、监测监控等核查情况 (103) 第四章煤矿生产能力核定结果 (105) 第一节各环节能力核定结果分析 (105) 第二节煤炭资源保障程度分析 (105) 第三节煤矿生产能力核定结果 (106) 第五章问题及建议 (106) 第一节各生产系统(环节)存在的主要问题 (106) 第二节建议采取的整改措施 (106)

通风能力核定报告

通风能力核定报告公司内部档案编码:[OPPTR-OPPT28-OPPTL98-OPPNN08]

山西介休大佛寺煤业有限公司 通风系统能力核定报告 一、核定通风系统生产能力的必备条件 矿井通风系统生产能力核定必备条件见表1。 表1 矿井通风系统生产能力核定必备条件 由上表可知,矿井具备通风系统生产能力核定的必备条件,可对矿井进行通风系统生产能力核定。 二、通风概况 矿井有完整独立的通风、防尘、防灭火及安全监控系统,通风系统合理,通风设施齐全可靠;采用机械通风,运转风机和备用风机具备同等能力,通风机经具备资质的检测检验机构测试合格;安全检测仪器、仪表齐全可靠;局部通风采用双风机,双电源,并能自动切换,局部通风机的安装和使用符合规定;井下不存在串联

通风;矿井瓦斯管理符合规程规定。通风系统具备能力核定必备条件。 ㈠、通风方式、方法 矿井通风方式采用分列式,主要通风机工作方式采用抽出式。 ㈡、进、回风井筒数量及风量 主、副斜井进风,回风立井回风。总进风量为6350m3/min,其中,主斜井进风2048m3/min,副斜井进风4302m3/min,总回风量6455m3/min。 ㈢、矿井需要风量、实际风量、有效风量 矿井需风量6280m3/min,实际风量6350m3/min,有效风量6300m3/min,有效风量率99%。 ㈣、矿井瓦斯等级 矿井2011年联合试运转期间的瓦斯等级鉴定结果批复为矿井瓦斯绝对涌出量1.98m3/min,瓦斯相对涌出量1.10m3/t,二氧化碳绝对涌出量3.17m3/min,二氧化碳相对涌出量1.67m3/t,属低瓦斯矿井。2012年生产期间瓦斯等级和二氧化碳涌出量鉴定结果为矿井瓦斯绝对涌出量3.28m3/min,相对涌出量1.91m3/t,二氧化碳绝对涌出量4.15m3/min,相对涌出量2.42m3/t,鉴定为低瓦斯矿井,故此次通风能力核定报告按2012年瓦斯等级及二氧化碳涌出量计算。 ㈤、主通风设备及运行参数 主通风机为两台FBCDZ-№25型对旋式轴流风机,一台工作,一台备用。配备电机型号为YBFH450M1-8,功率为2×280kW。据山西公信安全技术有限公司2012年2月提供的通风机技术性能测试报告,1#通风机:风量112.81m3/s,静压1810.1Pa,静压效率54.2%,2#通风机:风量111.85m3/s,静压1791.9Pa,静压效率53.2%,1、2#通风机检测项目符合AQ1011-2005标准要求,满足核定条件。 二、计算过程及结果

煤矿通风能力核定标准

煤矿通风能力核定标准 范围 本标准规定了井工煤矿通风能力核定的条件、要求、方法和技术要求。 本标准适用于晋煤集团所属矿井。 规范性引用文件 下列文件对于本文件的应用是必不可少的。凡是注日期的引用文件,仅所注日期的版本适用于本文件。凡是不注日期的引用文件,其最新版本(包括所有的修改单)适用于本文件。 煤矿安全规程 AQ1028-2006 煤矿井工开采通风技术条件 AQ1056-2008 煤矿通风能力核定标准 Q/JM J 煤矿矿井风量计算方法 Q/JM J 局部通风机管理标准 术语和定义 通风能力核定 矿井通风动力、通风网络、用风地点有效风量、稀释瓦斯所能满足的正常年生产煤量。 有效风量 送到采掘工作面、硐室和其他用风地点的风量之总和。 通风需风系数 平衡矿井内部漏风和配风不均匀等因素而采用的系数。 1.1 通风能力系数 根据矿井等积孔平衡矿井产量,并结合当地煤炭企业实际情况恰当选取确保矿井通防安全的系数。 核定要求 1.2 矿井每年应进行通风能力核定。 1.3 矿井转入新水平生产或改变一翼通风系统后,应及时重新核定矿井通风能力。 1.4 矿井更换主要通风机,对主要通风机技术改造,主要通风机参数发生变化时,应重新核定矿井通风能力。 1.5 采掘生产工艺发生变化后,应重新核定矿井通风能力。 1.6 矿井瓦斯等级发生变化或瓦斯赋存条件发生重大变化后,应重新核定矿井通风能力。 1.7 实施改建、扩建、技术改造的矿井,应重新核定矿井通风能力。 1.8 矿井有多个独立通风系统时,应按照每一个主要通风机通风系统分别进行通风能力核定,矿井的通风能力为每一通风系统能力之和。矿井应按照每一通风系统能力合理组织生产。 核定条件 1.9 矿井应有完整独立的通风、防尘、防灭火、安全监控及抽采系统。 1.10 矿井应采用机械通风,运转风机和备用风机应具备同等能力,矿井主要通风机经具备资质的检测检验机构测试合格。 1.11 矿井通风安全检测仪器、仪表齐全可靠。 1.12 矿井局部通风机的安装和使用应符合相关规定。 1.13 矿井瓦斯管理符合规定。 1.14 采掘工作面的串联通风应符合《煤矿安全规程》对串联通风的有关规定,以及对串联通风采掘工作面的甲烷传感器的设置和管理规定。

矿井通风能力核定报告(2015年)

前言 为认真贯彻落实国务院第81次常务会议提出的“以风定产”等煤矿瓦斯治理措施,按照国家安全生产监督管理总局、国家煤矿安全监察局、国家发展和改革委员会联合下发的安监总煤字[2004]2544号关于印发(煤矿生产能力的若干规定)的通知,“各煤矿每年要进行一次通风能力核定工作,并根据核定的通风能力科学合理地组织生产,严禁超通风能力生产”。为预防瓦斯事故的发生,依据安监总煤矿字(2005)42号文件有关规定,对矿井生产系统进行矿井通风能力核定。 一、核定的目的及指导思想 1、坚持以风定产,根据《安全生产法》、《煤矿安全规程》的相关规定,并结合设计方案及《安全专篇》等确定矿井原煤生产规模。 2、杜绝超通风能力生产现象和超负荷运转。 3、优化通风系统和通风设施,减少漏风,提高有效风量,改善井下空气及气候条件,预防事故发生。 二、核定依据 1、安监总煤字(2005)42号文件关于《煤矿通风能力核定(试行)》 2、贵州省煤炭管理局黔煤规定(2005)129号文件“关于开展煤矿通风能力核定工作”。 3、矿井通风系统图及测风记录等相关资料。 4、煤矿安全规程(2011年)。

5、贵州省能源局黔能源发(2010)40号文件“关于对遵义市煤炭局《关于请求对<习水县XX煤矿煤与瓦斯突出危险性鉴定报告>进行审批的报告》的批复”。 6、《20123综采工作面回采作业规程》、《22226运输巷掘进作业规程》、《22226回风巷掘进作业规程》、《2015东翼大巷掘进作业规程》。 7、其他相关规定。

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2016年通风能力核定报告资料

沙湾县东升煤炭有限责任 公司 东升煤矿通风能力核定报告 二0一六年

会审签名表 会审单位及人员签字 生产技术科:年月日调度室:年月日机电科:年月日安检科:年月日企管科:年月日综合办:年月日机电矿长:年月日安全矿长:年月日生产矿长:年月日总工程师:年月日矿长:年月日

目录 第一章矿井概况..................................... - 1 - 一、矿井概况..................................... - 1 - 二、井田位置及范围............................... - 1 - 三、矿井开拓情况................................. - 3 - 四、通风系统..................................... - 4 - 五、主要通风机情况............................... - 4 - 六、瓦斯与二氧化碳情况........................... - 5 - 七、瓦斯抽放情况................................. - 5 - 八、安全监测监控系统............................. - 5 - 九、煤质自燃倾向性及爆炸性....................... - 5 - 第二章矿井需要风量计算............................. - 6 - 一、矿井通风能力核定方法的选择................... - 6 - 二、矿井需要风量计算............................. - 6 - 三、矿井总风量.................................. - 15 - 第三章矿井通风能力核算............................ - 16 - 一、 30 万t/a以下矿井计算方法.................. - 16 - 第四章矿井通风能力验证............................ - 18 - 一、矿井主要通风机性能验证...................... - 18 - 二、通风网络能力验证............................ - 18 - 三、用风地点有效风量验证........................ - 18 - 四、稀释瓦斯能力验证............................ - 18 - 五、问题及建议.................................. - 19 -

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