MM74C903中文资料

TL F 5909MM54C901 MM74C901(TTL) MM54C903 MM74C903(CMOS)Hex Inverting Buffer MM54C902 MM74C902(TTL) MM54C904 MM74C904(CMOS)Hex Non-Inverting Buffer

February 1988

MM54C901 MM74C901Hex Inverting TTL Buffer

MM54C902 MM74C902Hex Non-Inverting TTL Buffer MM54C903 MM74C903Hex Inverting CMOS Buffer

MM54C904 MM74C904Hex Non-Inverting CMOS Buffer

General Description

These hex buffers employ complementary MOS to achieve wide supply operating range low power consumption and high noise immunity These buffers provide direct interface from PMOS into CMOS or TTL and direct interface from CMOS to TTL or CMOS operating at a reduced V CC supply

Features

Y Wide supply voltage range 3 0V to 15V

Y Guaranteed noise margin 1 0V

Y High noise immunity 0 45V CC (typ )Y

TTL compatibility

Fan out of 2

driving standard TTL

Connection Diagrams

Dual-In-Line Package MM54C901 MM74C901MM54C903 MM74C903

TL F 5909–1Top View

Order Number MM54C901

MM74C901 MM54C903or MM74C903

Dual-In-Line Package MM54C902 MM74C902MM54C904 MM74C904

TL F 5909–2

Top View

Order Number MM54C902

MM74C902 MM54C904or MM74C904

C 1995National Semiconductor Corporation RRD-B30M105 Printed in U S A

Absolute Maximum Ratings(Note1)

If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin b0 3V to V CC a0 3V Voltage at Any Input Pin

MM54C901 MM74C901b0 3V to a15V MM54C902 MM74C902b0 3V to a15V MM54C903 MM74C903V CC b17V to V CC a0 3V MM54C904 MM74C904V CC b17V to V CC a0 3V Storage Temperature Range(T S)b65 C to a150 C Power Dissipation(P D)

Dual-In-Line700mW Small Outline500mW Operating Temperature Range(T A)

MM54C901 MM54C902

MM54C903 MM54C904b55 C to a125 C MM74C901 MM74C902

MM74C903 MM74C904b40 C to a85 C Operating V CC Range3 0V to15V Absolute Maximum V CC18V Lead Temperature(T L)

(Soldering 10seconds)260 C

DC Electrical Characteristics Min Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions Min Typ Max Units

CMOS TO CMOS

V IN(1)Logical‘‘1’’Input Voltage V CC e5 0V3 5V

V CC e10V8 0V

V IN(0)Logical‘‘0’’Input Voltage V CC e5 0V1 5V

V CC e10V2 0V

V OUT(1)Logical‘‘1’’Output Voltage V CC e5 0V I O e b10m A4 5V

V CC e10V I O e b10m A9 0V

V OUT(0)Logical‘‘0’’Output Voltage V CC e5 0V0 5V

V CC e10V1 0V I IN(1)Logical‘‘1’’Input Current V CC e15V V IN e15V0 0051 0m A I IN(0)Logical‘‘0’’Input Current V CC e15V V IN e0V b1 0b0 005m A I CC Supply Current V CC e15V0 0515m A TTL TO CMOS

V IN(1)Logical‘‘1’’Input Voltage54C V CC e4 5V V CC b1 5V

74C V CC e4 75V V CC b1 5V

V IN(0)Logical‘‘0’’Input Voltage54C V CC e4 5V0 8V

74C V CC e4 75V0 8V CMOS TO TTL

V IN(1)Logical‘‘1’’Input Voltage

MM54C901 MM54C903V CC e4 5V4 0V

MM54C902 MM54C904V CC e4 5V V CC b1 5V

MM74C901 MM74C903V CC e4 75V4 25V

MM74C902 MM74C904V CC e4 75V V CC b1 5V

V IN(0)Logical‘‘0’’Input Voltage

MM54C901 MM54C903V CC e4 5V1 0V

MM54C902 MM54C904V CC e4 5V1 5V

MM74C901 MM74C903V CC e4 75V1 0V

MM74C902 MM74C904V CC e4 75V1 5V

V OUT(1)Logical‘‘1’’Output Voltage54C V CC e4 5V I O e b800m A2 4V

74C V CC e4 75V I O e b800m A2 4V

V OUT(0)Logical‘‘0’’Output Voltage

MM54C901 MM54C903V CC e4 5V I O e2 6mA0 4V

MM54C902 MM54C904V CC e4 5V I O e3 2mA0 4V

MM74C901 MM74C903V CC e4 75V I O e2 6mA0 4V

MM74C902 MM74C904V CC e4 75V I O e3 2mA0 4V

2

DC Electrical Characteristics(Continued)

Min Max limits apply across temperature range unless otherwise noted

Symbol Parameter Conditions Min Typ Max Units

OUTPUT DRIVE(See54C 74C Family Characteristics Data Sheet)(Short Circuit Current)

(MM54C901 MM74C901 MM54C903 MM74C903)

I SOURCE Output Source Current V CC e5 0V V OUT e0V

b5 0mA (P-Channel)T A e25 C V IN e0V

I SOURCE Output Source Current V CC e10V V OUT e0V

b20mA (P-Channel)T A e25 C V IN e0V

I SINK Output Sink Current V CC e5 0V V OUT e V CC

9 0mA

(N-Channel)T A e25 C V IN e V CC

I SINK Output Sink Current V CC e5 0V V OUT e0 4V

3 8mA

(N-Channel)T A e25 C V IN e V CC

(MM54C902 MM74C902 MM54C904 MM74C904)

I SOURCE Output Source Current V CC e5 0V V OUT e0V

b5 0mA (P-Channel)T A e25 C V IN e V CC

I SOURCE Output Source Current V CC e10V V OUT e0V

b20mA (P-Channel)T A e25 C V IN e V CC

I SINK Output Sink Current V CC e5 0V V OUT e V CC

9 0mA

(N-Channel)T A e25 C V IN e0V

I SINK Output Sink Current V CC e5 0V V OUT e0 4V

3 8mA

(N-Channel)T A e25 C V IN e0V

AC Electrical Characteristics T A e25 C C L e50pF unless otherwise noted

Symbol Parameter Conditions Min Typ Max Units MM54C901 MM74C901 MM54C903 MM74C903

t pd1Propagation Delay Time V CC e5 0V3870ns to a Logical‘‘1’’V CC e10V2230ns t pd0Propagation Delay Time V CC e5 0V2135ns to a Logical‘‘0’’V CC e10V1320ns

C IN Input Capacitance Any Input(Note2)14pF

C P

D Power Dissipation Capacity(Note3)Per Buffer30pF MM54C902 MM74C902 MM54C904 MM74C904

t pd1Propagation Delay Time V CC e5 0V5790ns to a Logical‘‘1’’V CC e10V2740ns t pd0Propagation Delay Time V CC e5 0V5490ns to a Logical‘‘0’’V CC e10V2540ns

C IN Input Capacitance Any Input(Note2)5 0pF

C P

D Power Dissipation Capacity(Note3)Per Buffer50pF

AC Parameters are guaranteed by DC correlated testing

Note1 ‘‘Absolute Maximum Ratings’’are those values beyond which the safety of the device cannot be guaranteed Except for‘‘Operating Temperature Range’’they are not meant to imply that the devices should be operated at these limits The table of‘‘Electrical Characteristics’’provides conditions for actual device operation

Note2 Capacitance is guaranteed by periodic testing

Note3 C PD determines the no load AC power consumption of any CMOS device For complete explanation see54C 74C Family Characteristics application note AN-90

3

Logic Diagrams

MM54C901 MM74C901CMOS to TTL Inverting Buffer

TL F 5909–3MM54C903 MM74C903

PMOS to TTL or CMOS Inverting Buffer

TL F 5909–4

MM54C902 MM74C902CMOS to TTL Buffer TL F 5909–5MM54C904 MM74C904PMOS to TTL or CMOS Buffer

TL F 5909–6

Typical Applications

PMOS to CMOS or TTL Interface

Note V CC a V DD s 17V

V CC s 15V

TL F 5909–7

CMOS to TTL or CMOS at a Lower V CC

Note V CC1e V CC2

TL F 5909–8

4

AC Test Circuit and Switching Time Waveforms

TL F 5909–9

Note Delays measured with input t r t f e 20ns

CMOS to CMOS

TL F 5909–10

Typical Performance Characteristics

to a Logical ‘‘0’’for the

Typical Propagation Delay MM54C903 MM74C903

MM54C901 MM74C901and TL F 5909–11MM54C901 MM74C901and to a Logical ‘‘1’’for the

Typical Propagation Delay M54C903 MM74C903

TL F 5909–13

to a Logical ‘‘0’’for the

Typical Propagation Delay MM54C904 MM74C904MM54C902 MM74C902and TL F 5909–14

to a Logical ‘‘1’’for the

Typical Propagation Delay MM54C904 MM74C904

MM54C902 MM74C902and TL F 5909–12

5

M M 54C 901 M M 74C 901(T T L ) M M 54C 903 M M 74C 903(C M O S )H e x I n v e r t i n g B u f f e r M M 54C 902 M M 74C 902(T T L ) M M 54C 904 M M 74C 904(C M O S )H e x N o n -I n v e r t i n g B u f f e r

Physical Dimensions inches (millimeters)

Ceramic Dual-In-Line Package (J)

Order Number MM54C901J MM74C901J MM54C902J

MM74C902J MM54C903J MM74C903J MM54C904J or MM74C904J

NS Package Number J14A

Molded Dual-In-Line Package (N)

Order Number MM54C901N MM74C901N MM54C902N

MM74C902N MM54C903N MM74C903N MM54C904N or MM74C904N

NS Package Number N14A

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a)are intended for surgical implant support device or system whose failure to perform can into the body or (b)support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can effectiveness

be reasonably expected to result in a significant injury to the user

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