TMS320DM365 IPNetCam Hardware Technical Test Report
Version: Ver0.7
May 2009
Contents
1、System Power Design Rule (1)
1.1 Power plane and system_loading testing. (1)
1.2 DC(12V) and PoE(48V) plus in testing : (1)
1.3 System power and PoE DC/DC testing (6)
2、IP CAM HW Timing Test Report (19)
2.1 SD CARD (19)
2.2 NAND FLASH Timing (23)
2.3 I2C Bus Timing (29)
2.4 TV Signal OUT Check : (33)
3、Hardware Function Test Condition and Method (35)
4、Auto IRIS Test Report (36)
5、Miscellaneous (37)
1、System Power Design Rule
1.1
Power plane and system_loading testing.
1
1.2DC(12V) and PoE(48V) plus in testing :
1. DC(12V) plug in spike voltage testing :
The spike voltage don’t over rated voltage of TPS5430 VIN at DC(12V) plug in J2(DC jack).
Waveform is tested on D2 voltage side.
a. TPS5430 rated voltage: 36 V (Max)
b. DC (12V) input range: 9.5V ~ 14.5V
c. Tested result:
The spike voltage doesn’t over 36V at all input range.
Please see follow waveform.
Fig1. Plug in voltage: 14.5V Spike voltage: 20.5V < 36V
Fig2. Plug in voltage : 12V Spike voltage : 20.9V < 36V
Fig3. Plug in voltage: 9.5V Spike voltage : 13.7V < 36V
2.PoE(48V) plug in spike voltage testing :
The spike voltage don’t over rated voltage of TPS23753 VDD at PoE(48V) plug in J3(RJ45 jack). Waveform is tested on D8 voltage side.
a. TPS23753 rated voltage: 100V (Max)
b. PoE(48V) input range : 36V ~ 57V
c. Tested result:
The spike voltage doesn’t over 100V at all input range. Please see follow waveform. Fig1. Plug in voltage : 57V Spike voltage : 70.8V < 100V
Fig2. Plug in voltage: 48V Spike voltage : 56.8V < 100V
Fig3. Plug in voltage: 36V Spike voltage : 48.2V < 100V
1.3System power and PoE DC/DC testing
1. Main power on/off sequence testing:
The sequence need follow
DM365 power-supply sequencing.
Power on: 1.3V => 1.8V => 3.3V
or 1.3V => 1.8V, 3.3V
Power off: 3.3V => 1.8V => 1.3V
or 3.3V, 1.8V => 1.3V
a. DM365 power-supply sequencing request:
b. Tested result:
Main power on/off sequence all follow
DM365 power-supply sequencing request
Please see follow waveform.
VCC1.2VBU : RTC core voltage
VCC1.2VD : Main core voltage
VCC1.8VD : 1.8V I/O voltage
VCC3.3VD : 3.3V I/O voltage
Power on sequence: Fig1. and Fig2. and Fig3
Power off sequence: Fig4. and Fig5.
Fig1. Power on sequence for VCC1.2VBU and VCC1.2VD (first time PWR_VIN on) CH1 VCC1.2BU
CH3 VCC1.3VD
CH1 VCC1.2VD
CH2 VCC1.8VD
CH3 VCC3.3VD
CH4 DMSoC_RST(DM365_RST)
Fig3. Small scale main block power on sequence
CH1 VCC1.2VD
CH2 VCC1.8VD
CH3 VCC3.3VD
CH4 DMSoC_RST(DM365_RST)
CH1 VCC1.3VD
CH2 VCC1.8VD
CH3 VCC3.3VD
CH4 DMSoC_RST(DM365_RST)
Fig5. Small scale main block power off sequence
CH1 VCC1.3VD
CH2 VCC3.3VD
CH3 VCC1.8VD
CH4 DMSoC_RST(DM365_RST)
2. Main power and PoE 12V ripples testing:
a.VCC1.2VD(DCDC2) : Normal load (225mA)
VCC1.2VD = 1.33V
Ripple voltage = 17.6 mV(vp-p)
SN rate: 0.018 ÷ 1.33 = 1.4%
Fig. Normal load (225mA) :
CH1 U5/PIN15
CH4 C54 1.3V side
b.VCC1.3VD(DCDC2) : Max load (594mA)
VCC1.3V = 1.32V
Ripple voltage = 12.8 mV(vp-p)
SN rate : 0.013 ÷ 1.32 = 1.0%
Fig. Max load (594mA)
CH1 U5/PIN15
CH4 C54 1.3V side
c.VCC3.3VD(DCDC1) : Normal load (436mA)
VCC3.3V = 3.33V
Ripple voltage = 10.6 mV(vp-p)
SN rate: 0.011 ÷ 3.33 = 0.3%
Fig. Normal load (436mA)
CH1 U5/PIN17
CH4 C50 3.3V side
d.VCC3.3VD(DCDC1) : Max load (878mA)
VCC3.3V = 3.328V
Ripple voltage = 11.3 mV(vp-p)
SN rate : 0.0113 ÷ 3.328 = 0.3%
Fig. Max load (878mA)
CH1 U5/PIN17
CH4 C50 3.3V side
Ripple voltage = 5.4 mV(vp-p)
SN rate: 0.005 ÷ 1.8 = 0.3%
Fig. Normal load (140mA)
CH4 C51 1.8V side
Ripple voltage = 6.0 mV(vp-p)
SN rate : 0.006 ÷ 2.83 = 0.2%
Fig. Normal load (7.5mA)
CH4 C57 2.85V side
g.PoE12V : Max load (963mA)
PoE12V = 11.96V
Ripple voltage = 82 mV(vp-p)
SN rate : 0.082 ÷ 11.96 = 0.7%
Fig. MaX load (963mA)
CH1 TP3 PWM pulse, CH3 Ripple on C27 11.96V side, CH4 Loading current
h.PoE12V : Normal load (264mA)
PoE12V = 11.97V
Ripple voltage = 36.8 mV(vp-p)
SN rate : 0.037 ÷ 11.97 = 0.3%
Fig. normal load (264mA)
CH1 TP3 PWM pulse, CH3 Ripple on C27 11.96V side, CH4 Loading current