OP07C中文资料
OUT ?+
OFFSET N2
IN?IN+OFFSET N1
13
2
8612348765OFFSET N1
IN?
IN+
V CC?OFFSET N2V CC+OUT NC
D OR P PACKAGE
(TOP VIEW)NC ?No internal connection
OP07C,OP07D
https://www.wendangku.net/doc/f37780126.html, SLOS099F –OCTOBER 1979–REVISED JANUARY 2014
OP07x Precision Operational Amplifiers
Check for Samples:OP07C ,OP07D
FEATURES
DESCRIPTION These devices offer low offset and long-term stability ?Low Noise
by means of a low-noise,chopperless,bipolar-input-?No External Components Required
transistor amplifier circuit.For most applications,?Replace Chopper Amplifiers at a Lower Cost
external components are not required for offset nulling and frequency compensation.The true ?Wide Input-Voltage Range:0to ±14V Typ
differential input,with a wide input-voltage range and
?
Wide Supply-Voltage Range:±3V to ±18V outstanding common-mode rejection,provides
maximum flexibility and performance in high-noise
environments and in noninverting applications.Low
bias currents and extremely high input impedances
are maintained over the entire temperature range.
The OP07devices are unsurpassed for low-noise,
high-accuracy amplification of very-low-level signals.
These devices are characterized for operation from
0°C to 70°C.
Symbol
Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of
7 6
4V CC+ OUT
V CC?
OFFSET N1 OFFSET N2
IN+
IN?1 8
3 2
COMPONENT COUNT
Resistors Transistors Capacitors 28 39 4
OP07C,OP07D
SLOS099F–OCTOBER1979–REVISED https://www.wendangku.net/doc/f37780126.html,
Schematic
Current values shown are nominal.
OP07C,OP07D https://www.wendangku.net/doc/f37780126.html, SLOS099F–OCTOBER1979–REVISED JANUARY2014
Absolute Maximum Ratings
over operating free-air temperature range(unless otherwise noted)(1)
MIN MAX UNIT V CC+(2)22 Supply voltage V
V CC–(2)–22 Differential input voltage(3)±30V
V I Input voltage range(either input)(4)±22V Duration of output short circuit(5)Unlimited
D package97
θJA Package thermal impedance,junction to free air(6)(7)°C/W
P package85
T J Operating virtual-junction temperature150°C Lead temperature1,6mm(1/16in)from case for10s260°C
T stg Storage temperature range–65150°C (1)Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.These are stress ratings
only,and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)All voltage values,unless otherwise noted,are with respect to the midpoint between V CC+and V CC?.
(3)Differential voltages are at IN+with respect to IN?.
(4)The magnitude of the input voltage must never exceed the magnitude of the supply voltage or15V,whichever is less.
(5)The output may be shorted to ground or to either power supply.
(6)Maximum power dissipation is a function of T J(max),θJA,and T A.The maximum allowable power dissipation at any allowable ambient
temperature is P D=(T J(max)–T A)/θJA.Selecting the maximum of150°C can affect reliability.
(7)The package thermal impedance is calculated in accordance with JESD51-7.
Recommended Operating Conditions
over operating free-air temperature range(unless otherwise noted)
MIN MAX UNIT
V CC±Supply voltage±3±18V
V IC Common-mode input voltage V CC±=±15V–1313V
T A Operating free-air temperature070°C
OP07C,OP07D
SLOS099F–OCTOBER1979–REVISED https://www.wendangku.net/doc/f37780126.html,
Electrical Characteristics
at specified free-air temperature,V CC±=±15V(unless otherwise noted)(1)
OP07C OP07D PARAMETER TEST CONDITIONS T A(2)UNIT
MIN TYP MAX MIN TYP MAX
25°C60150
V IO Input offset voltage V O=0V R S=50ΩμV
0°C to70°C85250
Temperature coefficient
αVIO V O=0V R S=50Ω0°C to70°C0.5 2.5μV/°C of input offset voltage
Long-term drift of input
See(3)0.4μV/mo offset voltage
Offset adjustment range R S=20kΩ,See Figure125°C±4mV
25°C0.86
I IO Input offset current nA
0°C to70°C 1.68
Temperature coefficient
αIIO0°C to70°C1250pA/°C of input offset current
25°C±1.8±12
I IB Input bias current nA
0°C to70°C±2.2±14
Temperature coefficient
αIIB0°C to70°C1850pA/°C of input bias current
25°C±13±14±13±14 Common-mode input
V ICR V voltage range0°C to70°C±13±13.5±13±13.5
R L≥10kΩ±12±13±12±13
R L≥2kΩ25°C±11.5±12.8±11.5±12.8
V OM Peak output voltage V
R L≥1kΩ±12±12
R L≥2kΩ0°C to70°C±11±12.6±11±12.6
V CC=15V,V O=1.4V to11.4V,
25°C100400400
R L≥500kΩ
Large-signal differential
A VD V/mV
voltage amplification25°C120400120400
V O=±10,R L=2kΩ
0°C to70°C100400100400
B1Unity-gain bandwidth25°C0.40.60.40.6MHz
r i Input resistance25°C833731MΩ
25°C10012094110 Common-mode
CMRR V IC=±13V,R S=50ΩdB rejection ratio0°C to70°C9712094106
25°C732732 Supply-voltage sensitivity
k SVS V CC+=±3V to±18V,R S=50ΩμV/V (ΔV IO/ΔV CC)0°C to70°C10511051
V O=0,No load8015080150
P D Power dissipation25°C mW
V CC+=±3V,V O=0,No load4848
(1)Since long-term drift cannot be measured on the individual devices prior to shipment,this specification is not intended to be a warranty.
It is an engineering estimate of the averaged trend line of drift versus time over extended periods after the first30days of operation.
(2)All characteristics are measured with zero common-mode input voltage,unless otherwise specified.
(3)The package thermal impedance is calculated in accordance with JESD51-7.
OUT V CC
C+
IN?IN+–OP07C,OP07D
https://www.wendangku.net/doc/f37780126.html, SLOS099F –OCTOBER 1979–REVISED JANUARY 2014
Operating Characteristics
at specified free-air temperature,V CC =5V (unless otherwise noted)
OP07C OP07D PARAMETER
TEST CONDITIONS (1)UNIT
TYP TYP f =10Hz
10.510.5V n
Input offset voltage f =100Hz 10.210.3nV/√Hz f =1kHz 9.89.8V N(PP)
Peak-to-peak equivalent input noise voltage f =0.1Hz to 10Hz 0.380.38μV f =10Hz 0.350.35I n
Equivalent input noise current f =100Hz 0.150.15nV/√Hz f =1kHz 0.130.13I N(PP)
Peak-to-peak equivalent input noise current f =0.1Hz to 10Hz 1515pA SR Slew rate R L ≥2k Ω0.30.3V/μs (1)All characteristics are measured under open-loop conditions,with zero common-mode input voltage,unless otherwise noted.
APPLICATION INFORMATION
Figure 1.Input Offset-Voltage Null Circuit
OP07C,OP07D
SLOS099F–OCTOBER1979–REVISED https://www.wendangku.net/doc/f37780126.html,
REVISION HISTORY
Changes from Revision E(May2004)to Revision F Page
?Updated document to new TI data sheet format-no specification changes (1)
?Deleted Ordering Information table (1)
PACKAGING INFORMATION
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
Addendum-Page 1
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check https://www.wendangku.net/doc/f37780126.html,/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal Device Package Type Package Drawing
Pins
SPQ Reel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant OP-07DPSR SO
PS 82000330.016.48.2 6.6 2.512.016.0Q1OP07CDR SOIC
D 82500330.012.4 6.4 5.2 2.18.012.0Q1OP07CDRG4SOIC
D 82500330.012.4 6.4 5.2 2.18.012.0Q1OP07DDR SOIC D 82500
330.012.4 6.4 5.2 2.18.012.0Q1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) OP-07DPSR SO PS82000367.0367.038.0 OP07CDR SOIC D8*******.5338.120.6 OP07CDRG4SOIC D8*******.5338.120.6
OP07DDR SOIC D8*******.5338.120.6
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