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stm8L 数据手册

stm8L 数据手册
stm8L 数据手册

October 2010Doc ID 15275 Rev 111/81

STM8L101xx

8-bit ultralow power microcontroller with up to 8 Kbytes Flash,

multifunction timers, comparators, USART , SPI, I2C

Features

Main microcontroller features

–Supply voltage range 1.65 V to 3.6 V –Low power consumption (Halt: 0.3μA, Active-halt: 0.8μA, Dynamic Run: 150μA/MHz)

–STM8 Core with up to 16 CISC MIPS throughput

–Temp. range: -40 to 85°C and 125 °C ■

Memories

–Up to 8 Kbytes of Flash program including up to 2 Kbytes of data EEPROM –Error correction code (ECC)

–Flexible write and read protection modes –In-application and in-circuit programming –Data EEPROM capability – 1.5 Kbytes of static RAM

Clock management

–Internal 16 MHz RC with fast wakeup time (typ. 4μs)

–Internal low consumption 38kHz RC driving both the IWDG and the AWU ■

Reset and supply management

–Ultralow power, ultrasafe power-on-reset /power down reset

–Three low power modes: Wait, Active-halt, Halt ■

Interrupt management

–Nested interrupt controller with software priority control

–Up to 29 external interrupt sources ■

I/Os

–Up to 30 I/Os, all mappable on external interrupt vectors

–I/Os with prog. input pull-ups, high

sink/source capability and one LED driver infrared output

Peripherals

–Two 16-bit general purpose timers (TIM2 and TIM3) with up and down counter and 2 channels (used as IC, OC, PWM)

–One 8-bit timer (TIM4) with 7-bit prescaler –Infrared remote control (IR)–Independent watchdog –Auto-wakeup unit

–Beeper timer with 1, 2 or 4 kHz frequencies –SPI synchronous serial interface –Fast I2C Multimaster/slave 400 kHz

–USART with fractional baud rate generator – 2 comparators with 4 inputs each ■Development support

–Hardware single wire interface module (SWIM) for fast on-chip programming and non intrusive debugging –In-circuit emulation (ICE)■

96-bit unique ID

Table 1.

Device summary

Reference

Part number

STM8L101xx

STM8L101F1, STM8L101F2, STM8L101F3,

STM8L101G2, STM8L101G3STM8L101K3

https://www.wendangku.net/doc/fa10404751.html,

Contents STM8L101xx

Contents

1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3Product overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.1Central processing unit STM8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.2Development tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.3Single wire data interface (SWIM) and debug module . . . . . . . . . . . . . . . 10

3.4Interrupt controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.5Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.6Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.7Voltage regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.8Clock control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.9Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.10Auto-wakeup counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.11General purpose and basic timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.12Beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.13Infrared (IR) interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.14Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.15USART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.16SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.17I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5Memory and register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6Interrupt vector mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 7Option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8Unique ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/81 Doc ID 15275 Rev 11

STM8L101xx Contents

9Electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

9.1Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

9.1.1Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

9.1.2Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

9.1.3Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

9.1.4Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

9.1.5Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

9.2Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

9.3Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

9.3.1General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

9.3.2Power-up / power-down operating conditions . . . . . . . . . . . . . . . . . . . . 41

9.3.3Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

9.3.4Clock and timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

9.3.5Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

9.3.6I/O port pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

9.3.7Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

9.3.8Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

9.3.9EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

9.4Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

10Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

10.1ECOP ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

10.2Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 11Device ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

12STM8 development tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

12.1Emulation and in-circuit debugging tools . . . . . . . . . . . . . . . . . . . . . . . . . 74

12.2Software tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

12.2.1STM8 toolset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

12.2.2 C and assembly toolchains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

12.3Programming tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 13Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Doc ID 15275 Rev 113/81

List of tables STM8L101xx List of tables

Table 1.Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2.Device features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3.Legend/abbreviation for table4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 4.STM8L101xx pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 5.Flash and RAM boundary addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 6.I/O Port hardware register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 7.General hardware register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 8.CPU/SWIM/debug module/interrupt controller registers. . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 9.Interrupt mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 10.Option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 11.Option byte description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 12.Unique ID registers (96 bits). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 13.Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 14.Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 15.Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 16.General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 17.Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 18.Total current consumption in Run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 19.Total current consumption in Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 20.Total current consumption and timing in Halt and Active-halt mode at

VDD = 1.65 V to 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 21.Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 22.HSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 23.LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 24.RAM and hardware registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 25.Flash program memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 26.I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 27.Output driving current (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 28.Output driving current (true open drain ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 29.Output driving current (PA0 with high sink LED driver capability). . . . . . . . . . . . . . . . . . . . 53 Table 30.NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 31.SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 32.I2C characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table https://www.wendangku.net/doc/fa10404751.html,parator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 34.EMS data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Table 35.EMI data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Table 36.ESD absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Table 37.Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Table 38.Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Table 39.UFQFPN32 - 32-lead ultra thin fine pitch quad flat no-lead package (5x5),

package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Table 40.LQFP32- 32-pin low profile quad flat package (7x7), package mechanical data . . . . . . . . 69 Table 41.UFQFPN28 - 28-lead ultra thin fine pitch quad flat no-lead package (4x4),

package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Table 42.UFQFPN20 3x3mm 0.6 mm mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Table 43.20-lead thin shrink small package, mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Table 44.Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 4/81 Doc ID 15275 Rev 11

STM8L101xx List of figures List of figures

Figure 1.STM8L101xx device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 2.Standard 20-pin UFQFPN package pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 3.20-pin UFQFPN package pinout for STM8L101F1U6ATR,

STM8L101F2U6ATR and STM8L101F3U6ATR part numbers. . . . . . . . . . . . . . . . . . . . . . 15 Figure 4.20-pin TSSOP package pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 5.Standard 28-pin UFQFPN package pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 6.28-pin UFQFPN package pinout for STM8L101G3U6ATR and

STM8L101G2U6ATR part numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 7.32-pin package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 8.Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 9.Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 10.Pin input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 11.IDD(RUN) vs. VDD, fCPU=2MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 12.IDD(RUN) vs. VDD, fCPU= 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 13.IDD(WAIT) vs. VDD, fCPU=2MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 14.IDD(WAIT) vs. VDD,fCPU= 16 MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 15.Typ. IDD(Halt) vs. VDD, fCPU=2 MHz and 16MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 16.Typical HSI frequency vs. V DD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 17.Typical HSI accuracy vs. temperature, V DD = 3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 18.Typical HSI accuracy vs. temperature, VDD = 1.65 V to 3.6 V. . . . . . . . . . . . . . . . . . . . . . 47 Figure 19.Typical LSI RC frequency vs. VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Figure 20.Typical VIL and VIH vs. VDD (standard I/Os). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Figure 21.Typical VIL and VIH vs. VDD (true open drain I/Os). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Figure 22.Typical pull-up resistance R PU vs. V DD with VIN=VSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Figure 23.Typical pull-up current I PU vs. V DD with VIN=VSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Figure 24.Typ. VOL at VDD = 3.0 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 25.Typ. VOL at VDD = 1.8 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 26.Typ. VOL at VDD = 3.0 V (true open drain ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 27.Typ. VOL at VDD = 1.8 V (true open drain ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 28.Typ. VDD - VOH at VDD = 3.0 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 29.Typ. VDD - VOH at VDD = 1.8 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 30.Typical NRST pull-up resistance R PU vs. V DD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Figure 31.Typical NRST pull-up current I pu vs. V DD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Figure 32.Recommended NRST pin configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Figure 33.SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Figure 34.SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Figure 35.SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Figure 36.Typical application with I2C bus and timing diagram 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 37.UFQFPN32 - 32-lead ultra thin fine pitch quad flat no-lead package outline (5x5). . . . . . 67 Figure 38.UFQFPN32 recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Figure 39.LQFP32 - 32-pin low profile quad flat package outline (7x7) . . . . . . . . . . . . . . . . . . . . . . 69 Figure 40.LQFP32 recommended footprint(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Figure 41.UFQFPN28 - 28-lead ultra thin fine pitch quad flat no-lead package outline (4x4)(1). . . . 70 Figure 42.UFQFPN28 recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Figure 43.UFQFPN20 3x3mm 0.6 mm package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Figure 44.UFQFPN20 recommended footprint (1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Figure 45.TSSOP20 - 20-lead thin shrink small package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Figure 46.TSSOP20 recommended footprint (1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Doc ID 15275 Rev 115/81

List of figures STM8L101xx Figure 47.STM8L101xx ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

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STM8L101xx Introduction

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1 I

ntroduction

This datasheet provides the STM8L101xx pinout, ordering information, mechanical and electrical device characteristics.

For complete information on the STM8L101xx microcontroller memory, registers and peripherals, please refer to the STM8L reference manual.

The STM8L101xx devices are members of the STM8L low power 8-bit family. They are referred to as low-density devices in the STM8L101xx microcontroller family reference manual (RM0013) and in the STM8L Flash programming manual (PM0054).All devices of the SM8L product line provide the following benefits:

Reduced system cost –Up to 8 Kbytes of low-density embedded Flash program memory including up to 2 Kbytes of data EEPROM

–High system integration level with internal clock oscillators and watchdogs.–

Smaller battery and cheaper power supplies.●

Low power consumption and advanced features –Up to 16 MIPS at 16 MHz CPU clock frequency

–Less than 150μA/MH, 0.8μA in Active-halt mode, and 0.3μA in Halt mode –

Clock gated system and optimized power management

Short development cycles

–Application scalability across a common family product architecture with compatible pinout, memory map and modular peripherals.–

Full documentation and a wide choice of development tools

Product longevity

–Advanced core and peripherals made in a state-of-the art technology –

Product family operating from 1.65V to 3.6 V supply

2 Description

The STM8L101xx low power family features the enhanced STM8 CPU core providing

increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations.

The family includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive in-application debugging and ultrafast Flash programming.All STM8L101xx microcontrollers feature low power low-voltage single-supply program Flash memory. The 8-Kbyte devices embed data EEPROM.

The STM8L101xx low power family is based on a generic set of state-of-the-art peripherals. The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different

Description STM8L101xx

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family very easy, and simplified even more by the use of a common set of development tools.

All STM8L low power products are based on the same architecture with the same memory mapping and a coherent pinout.

Table 2.Device features

Features STM8L101xx

Flash 2 Kbytes of Flash program

memory

4 Kbytes of Flash program

memory

8 Kbytes of Flash program memory including up to 2 Kbytes of Data EEPROM

RAM

1.5 Kbytes

Peripheral functions

Independent watchdog (IWDG), Auto-wakeup unit (AWU), Beep, Serial peripheral interface (SPI), Inter-integrated circuit (I2C),

Universal synchronous / asynchronous receiver / transmitter (USART),

2 comparators, Infrared (IR) interface

Timers T wo 16-bit timers, one 8-bit timer

Operating voltage 1.65 to 3.6 V

Operating temperature

-40 to +85 °C

-40 to +85 °C or -40 to +125 °C Packages UFQFPN20 3x3

UFQFPN28 4x 4UFQFPN20 3x3TSSOP20 4.4 x 6.4

UFQFPN28 4x4UFQFPN20 3x3UFQFPN32LQFP32

STM8L101xx Product overview

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3 Product overview

Figure 1.

STM8L101xx device block diagram

Legend:

AWU: Auto-wakeup unit

Int. RC: internal RC oscillator

I2C: Inter-integrated circuit multimaster interface POR/PDR: Power on reset / power down reset SPI: Serial peripheral interface

SWIM: Single wire interface module

USART: Universal synchronous / asynchronous receiver / transmitter IWDG: Independent watchdog

STM816 MHz int RC Clock

controller Clocks AWU

Beeper

Address and data bus

38 kHz int RC

Debug module

I2C1SPI USART Up to 8 Kbytes Flash memory controller 1.5 Kbytes to core and peripherals

IWDG Core 16-bit Timer 2(SWIM)up to 16 MHz

Nested interrupt up to 29 external

multimaster

8-bit Timer 4

SRAM interrupts (including up to 2 Kbytes data EEPROM)Power Volt. reg.

@V DD

V DD18

V DD =1.65 V

V SS

3.6 V NRST

POR/PDR

to Reset COMP1

COMP2

Port A Port B Port C Port D

RX, TX, CK

SDA, SCL

PA[6:0]PB[7:0]PC[6:0]PD[7:0]

MOSI, MISO, SCK, NSS BEEP

SWIM

COMP1_CH[4:1]

COMP_REF Infrared interface

IR_TIM

16-bit Timer 3TIM2_CH[2:1]TIM3_CH[2:1]TIM2_TRIG TIM3_TRIG

COMP2_CH[4:1]

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3.1 Central processing unit STM8

The 8-bit STM8 core is designed for code efficiency and performance.

It features 21 internal registers, 20 addressing modes including indexed, indirect and relative addressing, and 80 instructions.

3.2 Development tools

Development tools for the STM8 microcontrollers include:

The STice emulation system offering tracing and code profiling

The STVD high-level language debugger including C compiler, assembler and

integrated development environment ●

The STVP Flash programming software

The STM8 also comes with starter kits, evaluation boards and low-cost in-circuit debugging/programming tools.

3.3 Single wire data interface (SWIM) and debug module

The debug module with its single wire data interface (SWIM) permits non-intrusive real-time in-circuit debugging and fast memory programming.

The Single wire interface is used for direct access to the debugging module and memory programming. The interface can be activated in all device operation modes.

The non-intrusive debugging module features a performance close to a full-featured emulator. Beside memory and peripherals, also CPU operation can be monitored in real-time by means of shadow registers.

3.4 I nterrupt controller

The STM8L101xx features a nested vectored interrupt controller:

●Nested interrupts with 3 software priority levels ●26 interrupt vectors with hardware priority ●Up to 29 external interrupt sources on 10 vectors ●

Trap and reset interrupts

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3.5 Memory

The STM8L101xx devices have the following main features:

1.5 Kbytes of RAM

The EEPROM is divided into two memory arrays (see the STM8L reference manual for details on the memory mapping): –

Up to 8Kbytes of low-density embedded Flash program including up to 2Kbytes of data EEPROM. Data EEPROM and Flash program areas can be write protected independently by using the memory access security mechanism (MASS).–

64 option bytes (one block) of which 5 bytes are already used for the device.

Error correction code is implemented on the EEPROM.

3.6 Low power modes

To minimize power consumption, the product features three low power modes:

●Wait mode: CPU clock stopped, selected peripherals at full clock speed.

●Active-halt mode: CPU and peripheral clocks are stopped. The programmable wakeup time is controlled by the AWU unit.

Halt mode: CPU and peripheral clocks are stopped, the device remains powered on. Wakeup is triggered by an external interrupt.

3.7 Voltage regulators

The STM8L101xx embeds an internal voltage regulator for generating the 1.8 V power

supply for the core and peripherals.

This regulator has two different modes: main voltage regulator mode (MVR) and low power voltage regulator mode (LPVR). When entering Halt or Active-halt modes, the system automatically switches from the MVR to the LPVR in order to reduce current consumption.

3.8 Clock control

The STM8L101xx embeds a robust clock controller. It is used to distribute the system clock

to the core and the peripherals and to manage clock gating for low power modes. This system clock is a 16-MHz High Speed Internal RC oscillator (HSI RC), followed by a programmable prescaler.

In addition, a 38kHz low speed internal RC oscillator is used by the independent watchdog (IWDG) and Auto-wakeup unit (AWU).

3.9 I ndependent watchdog

The independent watchdog (IWDG) peripheral can be used to resolve processor

malfunctions due to hardware or software failures.

It is clocked by the 38kHZ LSI internal RC clock source, and thus stays active even in case of a CPU clock failure.

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3.10 Auto-wakeup counter

The auto-wakeup (AWU) counter is used to wakeup the device from Active-halt mode.

3.11 General purpose and basic timers

STM8L101xx devices contain two 16-bit general purpose timers (TIM2 and TIM3) and one

8-bit basic timer (TIM4).

16-bit general purpose timers

The 16-bit timers consist of 16-bit up/down auto-reload counters driven by a programmable prescaler. They perform a wide range of functions, including:

●Time base generation

●Measuring the pulse lengths of input signals (input capture)

●Generating output waveforms (output compare, PWM and One pulse mode)●Interrupt capability on various events (capture, compare, overflow, break, trigger)●

Synchronization with other timers or external signals (external clock, reset, trigger and enable)

8-bit basic timer

The 8-bit timer consists of an 8-bit up auto-reload counter driven by a programmable

prescaler. It can be used for timebase generation with interrupt generation on timer overflow.

3.12 Beeper

The STM8L101xx devices include a beeper function used to generate a beep signal in the range of 1, 2 or 4 kHz when the LSI clock is operating at a frequency of 38kHz.

3.13 Infrared (IR) interface

The STM8L101xx devices contain an infrared interface which can be used with an IR LED for remote control functions. Two timer output compare channels are used to generate the infrared remote control signals.

3.14 Comparators

The STM8L101xx features two zero-crossing comparators (COMP1 and COMP2) sharing the same current bias and voltage reference. The voltage reference can be internal (comparison with ground) or external (comparison to a reference pin voltage).

Each comparator is connected to 4 channels, which can be used to generate interrupt, timer input capture or timer break. Their polarity can be inverted.

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3.15 USART

The USART interface (USART) allows full duplex, asynchronous communications with external devices requiring an industry standard NRZ asynchronous serial data format. It offers a very wide range of baud rates.

3.16 SP

I

The serial peripheral interface (SPI) provides half/ full duplex synchronous serial

communication with external devices. It can be configured as the master and in this case it provides the communication clock (SCK) to the external slave device. The interface can also operate in multi-master configuration.

3.17 I

2C

The inter-integrated circuit (I2C) bus interface is designed to serve as an interface between the microcontroller and the serial I 2C bus. It provides multi-master capability, and controls all I2C bus-specific sequencing, protocol, arbitration and timing. It manages standard and fast speed modes.

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4 Pin description

Figure 2.

Standard 20-pin UFQFPN package pinout

1.HS corresponds to 20 mA high sink/source capability.

2.High sink LED driver capability available on PA0. Refer to the description of the IR_CR register in the

STM8L reference manual (RM0013).

Note:

The COMP_REF pin is not available in this standard 20-pin UFQFPN package. It is available on Port A6 in the 20-pin UFQFPN package pinout for STM8L101F1U6ATR,

STM8L101F2U6ATR and STM8L101F3U6ATR part numbers (Figure 3 on page 15).

21345

6

7

8

9

11

1213141516

17

1819P D 0 (H S ) / T I M 3_C H 2 / C O M P 1_C H 3

V DD

V SS PA3 (HS)

PA2 (HS)P B 0 (H S ) / T I M 2_C H 1 / C O M P 1_C H 1

NRST / PA1 (HS)

P C 3 (H S ) / U S A R T _T X

P C 4 (H S ) / U S A R T _C K / C C O

P C 2 (H S ) / U S A R T _R X

P C 1 / I 2C _S C L

PB4 (HS) / SPI_NSS

PB5 (HS) / SPI_SCK PB6 (HS) / SPI_MOSI PB7 (HS) / SPI_MISO PC0 / I2C_SDA P B 1 (H S ) / T I M 3_C H 1 /C O M P 1_C H 2

P B 2 (H S ) / T I M 2_C H 2 / C O M P 2_C H 1

10

P B 3 (H S ) / T I M 2_T R I G / C O M P 2_C H 2

P A 0 (H S ) / S W I M / B E E P / I R _T I M

20

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Figure 3.

20-pin UFQFPN package pinout for STM8L101F1U6ATR,STM8L101F2U6ATR and STM8L101F3U6ATR part numbers

1.Please refer to the warning below.

2.HS corresponds to 20 mA high sink/source capability.

3.High sink LED driver capability available on PA0. Refer to the description of the IR_CR register in the

STM8L reference manual (RM0013).

Warning:

For the STM8L101F1U6ATR, STM8L101F2U6ATR and

STM8L101F3U6ATR part numbers (devices with COMP_REF pin), all ports available on 32-pin packages must be

considered as active ports. To avoid spurious effects, you have to configure them as input pull-up. A small increase in consumption (typ. < 300 μA) may occur during the power up and reset phase until these ports are properly configured.

21345

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7

8

9

11

1213141516

17

1819P D 0 (H S ) / T I M 3_C H 2 / C O M P 1_C H 3

V DD

V SS PA6 (HS) / COMP_REF

PA2 (HS)

P B 0 (H S ) / T I M 2_C H 1 / C O M P 1_C H 1

NRST / PA1 (HS)

P C 3 (H S ) / U S A R T _T X

P C 4 (H S ) / U S A R T _C K / C C O

P C 2 (H S ) / U S A R T _R X

P C 1 / I 2C _S C L

PB4 (HS) / SPI_NSS

PB5 (HS) / SPI_SCK PB6 (HS) / SPI_MOSI PB7 (HS) / SPI_MISO PC0 / I2C_SDA P B 1 (H S ) / T I M 3_C H 1 /C O M P 1_C H 2

P B 2 (H S ) / T I M 2_C H 2 / C O M P 2_C H 1

10

P B 3 (H S ) / T I M 2_T R I G / C O M P 2_C H 2

P A 0 (H S ) / S W I M / B E E P / I R _T I M

20

Pin description

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16/81 Doc ID 15275 Rev 11

Figure 4.

20-pin TSSOP package pinout

1.HS corresponds to 20 mA high sink/source capability.

2.High sink LED driver capability available on PA0. Refer to the description of the IR_CR register in the

STM8L reference manual (RM0013).

PA3 (HS)

P A2 (HS)NRST / PA1 (HS)

PA0 (HS) / SWIM / BEEP / IR_TIM

PC4 (HS) / USART_CK/ CCO V SS PC3 (HS) / USART_TX PC0 / I2C_SDA PC1 / I2C_SCL PB7 (HS) / SPI_MISO PB6 (HS) / SPI_MOSI PB1 (HS) / TIM3_CH1 / COMP1_CH2

PB2 (HS) / TIM2_CH2 / COMP2_CH1PB3 (HS) /TIM2_TRIG /COMP2_CH2PB4 (HS) / SPI_NSS

PB5 (HS) / SPI_SCK V DD

PD0 (HS) / TIM3_CH2 / COMP1_CH3PB0 (HS) / TIM2_CH1 / COMP1_CH1

PC2 (HS) / USART_RX 123456 7 10

9 8 201918171615 14 11

12 13

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Figure 5.

Standard 28-pin UFQFPN package pinout

1.HS corresponds to 20 mA high sink/source capability.

2.High sink LED driver capability available on PA0. Refer to the description of the IR_CR register in the

STM8L reference manual (RM0013).

Note:

The COMP_REF pin is not available in this standard 28-pin UFQFPN package. It is available on Port A6 in the 28-pin UFQFPN package pinout for STM8L101G3U6ATR and STM8L101G2U6ATR part numbers (Figure 6 on page 18).

P D 3(H S ) / C O M P 2_C H 4

P B 0 (H S ) / T I M 2_C H 1 / C O M P 1_C H 1

P B 1 (H S ) / T I M 3_C H 1 / C O M P 1_C H 2

P B 2 (H S ) / T I M 2_C H 2 / C O M P 2_C H 1

P D 0 (H S ) / T I M 3_C H 2 / C O M P 1_C H 3

P D 1 (H S ) / T I M 3_T R I G / C O M P 1_C H 4

P D 2(H S ) / C O M P 2_C H 3

PA5 (HS) / TIM3_BKIN

V SS V DD

NRST / PA1 (HS)

PA2 (HS)PA3 (HS)

PA4 (HS) / TIM2_BKIN PB6 (HS) / SPI_MOSI PB5 (HS) / SPI_SCK PB4 (HS) / SPI_NSS

PB3 (HS) / TIM2_TRIG / COMP2_CH2

PC0 / I2C_SDA PD4 (HS)

PB7 (HS) / SPI_MISO P C 4 (H S ) / U S A R T _C K / C C O

P C 3 (H S ) / U S A R T _T X

P C 2 (H S ) / U S A R T _R X

P C 1 / I 2C _S C L

P A 0 (H S ) / S W I M / B E E P / I R _T I M

P C 6 (H S )

P C 5 (H S )

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13

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Figure 6.

28-pin UFQFPN package pinout for STM8L101G3U6ATR and STM8L101G2U6ATR part numbers

1.HS corresponds to 20 mA high sink/source capability.

2.High sink LED driver capability available on PA0. Refer to the description of the IR_CR register in the

STM8L reference manual (RM0013).

Warning:

For the STM8L101G3U6ATR and STM8L101G2U6ATR part numbers (devices with COMP_REF pin), all ports available on 32-pin packages must be considered as active ports. To avoid spurious effects, you have to configure them as input pull-up. A small increase in consumption (typ. < 300 μA) may occur during the power up and reset phase until these ports are properly configured.

P D 3(H S ) / C O M P 2_C H 4

P B 0 (H S ) / T I M 2_C H 1 / C O M P 1_C H 1

P B 1 (H S ) / T I M 3_C H 1 / C O M P 1_C H 2

P B 2 (H S ) / T I M 2_C H 2 / C O M P 2_C H 1

P D 0 (H S ) / T I M 3_C H 2 / C O M P 1_C H 3

P D 1 (H S ) / T I M 3_T R I G / C O M P 1_C H 4

P D 2(H S ) / C O M P 2_C H 3

PA6 (HS) / COMP_REF

V SS V DD

NRST / PA1 (HS)

PA2 (HS)PA3 (HS)

PA4 (HS) / TIM2_BKIN PB6 (HS) / SPI_MOSI PB5 (HS) / SPI_SCK PB4 (HS) / SPI_NSS

PB3 (HS) / TIM2_TRIG / COMP2_CH2

PC0 / I2C_SDA PD4 (HS)

PB7 (HS) / SPI_MISO P C 4 (H S ) / U S A R T _C K / C C O

P C 3 (H S ) / U S A R T _T X

P C 2 (H S ) / U S A R T _R X

P C 1 / I 2C _S C L

P A 0 (H S ) / S W I M / B E E P / I R _T I M

P C 6 (H S )

P C 5 (H S )

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Figure 7.

32-pin package pinout

1.Example given for the UFQFPN32 package. The pinout is the same for the LQFP32 package.

2.HS corresponds to 20 mA high sink/source capability.

3.High sink LED driver capability available on PA0. Refer to the description of the IR_CR register in the

STM8L reference manual (RM0013).

1234PA5 (HS) / TIM3_BKIN PA6 (HS) / COMP_REF

V SS

V DD

NRST / PA1 (HS)

PA2 (HS)

PA3 (HS)

PA4 (HS) / TIM2_BKIN P D 1 (H S ) / T I M 3_T R I G / C O M P 1_C H 4

P D 2 (H S ) / / C O M P 2_C H 3

P D 3 (H S ) / C O M P 2_C H 4

P B 0 (H S ) / T I M 2_C H 1 / C O M P 1_C H 1

P B 1 (H S ) / T I M 3_C H 1 / C O M P 1_C H 2

P B 2 (H S ) / T I M 2_C H 2 / C O M P 2_C H 1

P B 3 (H S ) / T I M 2_T R I G / C O M P 2_C H 2

P D 0 (H S ) / T I M 3_C H 2 / C O M P 1_C H 3

PD7 (HS)PD6 (HS)PB4 (HS) / SPI_NSS

PB5 (HS) / SPI_SCK PB7 (HS)/ SPI_MISO PD5 (HS)

PD4 (HS)

PB6 (HS) / SPI_MOSI P C 3 (H S ) / U S A R T _T X

P C 2 (H S ) / U S A R T _R X

P C 1 / I 2C _S C L

P C 0 / I 2C _S D A

P A 0 (H S ) / S W I M / B E E P / I R _T I M

P C 6 (H S )

P C 5 (H S )

P C 4 (H S ) / U S A R T _C K / C C O

5678

9

10111213

141516

17

181920212223243231302928272625

Pin description

STM8L101xx

20/81 Doc ID 15275 Rev 11

Table 3.

Legend/abbreviation for table 4

Type I= input, O = output, S = power supply Level

Input CM = CMOS

Output

HS = high sink/source (20 mA)Port and control configuration Input float = floating, wpu = weak pull-up

Output T = true open drain, OD = open drain, PP = push pull

Reset state

Bold X (pin state after reset release).

Unless otherwise specified, the pin state is the same during the reset phase (i.e. “under reset”) and after internal reset release (i.e. at reset state).

Table 4.STM8L101xx pin description

Pin number Pin name T y p e

Input

Output

M a i n f u n c t i o n (a f t e r r e s e t )Alternate function

s t a n d a r d U F Q F P N 20

U F Q F P N 20 w i t h C O M P _R E F (1)

T S S O P 20

s t a n d a r d U F Q F P N 28

U F Q F P N 28 w i t h C O M P _R E F (1)

U F Q F P N 32 o r L Q F P 32

f l o a t i n g

w p u

E x t . i n t e r r u p t

H i g h s i n k /s o u r c e

O D

P P

114111NRST/P A1(2)I/O X HS X X Reset P A1

225222P A2I/O X X X HS X X Port A23-6333P A3

I/O X X X HS X X Port A3---444P A4/TIM2_BKIN I/O X X X HS X X Port A4Timer 2 - break input ---5-5P A5/TIM3_BKIN I/O X X X HS X X Port A5Timer 3 - break input -3--56P A6/COMP_REF I/O X X

X

HS

X

X

Port A6Comparator external reference

447667V SS S Ground 558778V DD

S Power supply

6

6

9

8

8

9

PD0/TIM3_CH2/COMP1_CH3

I/O X

X

X

HS

X

X

Port D0Timer 3 - channel 2 / Comparator 1 - channel 3---99

10

PD1/TIM3_TRIG/COMP1_CH4

I/O X X X HS X X

Port D1Timer 3 - trigger / Comparator 1 - channel 4---101011PD2/

COMP2_CH3 I/O X X X HS X X Port D2Comparator 2 -channel 3-

-

-

111112

PD3/

COMP2_CH4

I/O X

X

X

HS

X

X

Port D3

Comparator 2 -channel 4

最新STM8L15X中文参考手册资料

本参考手册的目标应用程序开发人员。它提供了完整的信息如何使用stm8l05xx,stm8l15xx 和stm8l16xx微控制器的存储器和外围设备。 该stm8l05xx / stm8l15xx / stm8l16xx是一个家庭的不同存储密度的微控制器和外围设备。这些产品是专为超低功耗应用。可用的外设的完整列表,请参阅产品数据表。 订购信息,引脚说明,机械和电气设备的特点,请参阅产品数据表。 关于STM8 SWIM通信协议信息和调试模块,请参阅用户手册(um0470)。 在STM8的核心信息,请参阅STM8的CPU编程手册(pm0044)。关于编程,擦除和保护的内部快闪记忆体,请参阅STM8L闪存编程手册(pm0054)。

1 中央处理单元(CPU)。30。 1.1 引言30 1.2 CPU的寄存器。30。 1.2.1 描述CPU寄存器。..。30 1.2.2 STM8 CPU寄存器图。..。34 1.3 全球配置寄存器(cfg_gcr)。34。 1.3.1 激活水平。..。34 1.3.2 游泳禁用。..。35 1.3.3 描述全局配置寄存器(cfg_gcr)。..。35 1.3.4 全局配置寄存器图及复位值。..。35 2 启动ROM . . . 36 3程序存储器和数据存储器。37。 3.1引言37 3.2术语。37。 3.3个主要的快闪存储器的特点。38。 3.4记忆的组织。39。 3.4.1低密度设备的存储器组织。39 3.4.2介质密度的装置记忆的组织。..。40 3.4.3介质+密度装置记忆的组织。..。41 3.4.4高密度存储器组织。..。42 3.4.5专有代码区(译)。43 3.4.6用户区(UBC)。43 3.4.7数据的EEPROM(数据)。..。46 3.4.8主程序区。46 3.4.9选项字节。..。46 3.5内存保护。47。 3.5.1读出保护。47 3.5.2内存访问安全系统(质量)。47 3.5.3使写访问选项字节。49 3.6内存编程49 3.6.1同时读写(读写网)。..。49 2 / 573文档ID 15226转9 rm0031内容 3.6.2字节编程。..。49 3.6.3字编程。50 3.6.4块编程。50 3.6.5选项字节编程。52 Flash 3.7的低功耗模式。52。 3.8例ICP和IAP。52。 3.9闪光寄存器57 3.9.1闪光控制寄存器1(flash_cr1)。57 3.9.2闪光控制寄存器2(flash_cr2)。58

STM8L152中文介绍

STM8L152介绍 8位超低功耗单片机,高达64 + 2字节数据的闪存EE PROM,EEPROM (Electrically Erasable Programmable ), 实时时钟,液晶显示器,定时器,USART,C,SPI,模数转换器,数模转换器,比较器特点:操作条件:工作电源:1.65v~ 3.6v 温度范围:40 to 85, 105 or 125 低功耗的特点:5个低功耗模式:等,低功率运行 (5.9|ì一),低功耗等(3|ì一),active-halt 全实时时钟(1.4|ì一),停止(400) 动态功率消耗:200UA/兆赫+ 330UA,快速唤醒从停止模式(4.7us) 超低漏 I/ O:50nA 先进的stm8核心: 哈佛结构和三级流水线

最大频率:16条16mhz,相关峰 最多40个外部中断源 复位和供应管理: 低功率,超安全欠压复位5可编程阈值 超低功率POR /PDR(通电复位/Protection(保护)、Detection(检测)、Response(响应)) 可编程电压检测器(Programmable voltage detector (PVD)) 时钟管理 32kHz和1-16MHz晶体振荡器 工厂校准的内部16MHz RC和 38kHz的低功耗RC 时钟安全系统

低功耗RTC BCD日历,闹钟中断, 数字校准+ / - 0.5ppm的准确度 先进的防篡改检测 DMA 4个通道。 ADC,DAC的,SPIS,我 2C,USART接口,定时器,1路。存储器到存储器的 LCD:8x40或4x44瓦特/升压转换器 12位ADC1 Msps/28渠道 温度。传感器和内部参考。电压 记忆

STM8L051低功耗模式实现说明文档

STM8L051低功耗模式测试文档 STM8L051的五种低功耗模式wait ,low power run mode,low power wait mode,Ative-Halt mode,Halt mode。 1、WAIT mode 在等待模式,CPU的时钟是停止的,被选择的外设继续运行。W AIT mode 分为两种方式:WFE,WFI。WFE是等待事件发生,才从等待模式中唤醒。WFI是等待中断发生,才从等待模式中唤醒。 2、low power run mode 在低功耗运行模式下,CPU和被选择的外设在工作,程序执行在LSI或者LSE下,从RAM 中执行程序,Flash和EEPROM都要停止运行。电压被配置成Ultra Low Power模式。进入此模式可以通过软件配置,退出此模式可以软件配置或者是复位。 3、low power wait mode 这种模式进入是在low power run mode下,执行wfe。在此模式下CPU时钟会被停止,其他的外设运行情况和low power run mode类似。在此模式下可以被内部或外部事件、中断和复位唤醒。当被事件唤醒后,系统恢复到low power run mode。 4、Active-Halt mode 在此模式下,除了RTC外,CPU和其他外设的时钟被停止。系统唤醒是通过RTC中断、外部中断或是复位。 5、Halt mode 在此模式下,CPU和外设的时钟都被停止。系统唤醒是通过外部中断或复位。关闭内部的参考电压可以进一步降低功耗。通过配置ULP位和FWU位,也可以6us的快速唤醒,不用等待内部的参考电压启动。 一、各个低功耗模式的代码实现 1、WAIT mode 等待模式分为两种:WFI和WFE。 1.1 WFI mode 当执行“wfi”语句时,系统就进入WFI模式,当中断发生时,CPU被从WFI模式唤醒,执行中断服务程序和继续向下执行程序。 通过置位CFG_GCR的AL位,使主程序服务完中断服务程序后,重新返回到WFI 模式。 程序如下: void Mcuwfi() { PWR_UltraLowPowerCmd(ENABLE); //开启电源的低功耗模式 CLK_HSEConfig(CLK_HSE_OFF); //关闭HSE时钟(16MHz) #ifdef USE_LSE CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);

2021年STM8L中文参考手册-1

简介 欧阳光明(2021.03.07) 本参考手册的目标应用程序开发人员。它提供了完整的信息如何使用stm8l05xx,stm8l15xx和stm8l16xx微控制器的存储器和外围设备。 该stm8l05xx / stm8l15xx / stm8l16xx是一个家庭的不同存储密度的微控制器和外围设备。 这些产品是专为超低功耗应用。可用的外设的完整列表,请参阅产品数据表。 订购信息,引脚说明,机械和电气设备的特点,请参阅产品数据表。 关于STM8 SWIM通信协议信息和调试模块,请参阅用户手册(um0470)。 在STM8的核心信息,请参阅STM8的CPU编程手册(pm0044)。关于编程,擦除和保护的内部快闪记忆体,请参阅STM8L闪存编程手册(pm0054)。 表一、 类型零件号 控制器价值线低密度stm8l05xx设备:stm8l051x3 8KB Flash微控制器 价值线中密度stm8l05xx设备:stm8l052x6微控制器与32闪光 价值线高密度stm8l05xx设备:stm8l052x8 64-KB闪存微控制器 低密度stm8l15x设备:stm8l151c2 / K2 / G2/F2, stm8l151c3 / K3 / G3 / F3微控制器与4KB或8KB Flash 中密度stm8l15xx设备:stm8l151c4 / K4 / G4, 微控制器stm8l151c6 / K6 / G6,stm8l152c4 / K4和stm8l152c6 / K6 微控制器与16-KB或32闪光 培养基+密度stm8l15xx设备:stm8l151r6和 stm8l152r6微控制器与闪存(32比中密度器件广泛的外设范围) 高密度stm8l15xx设备:stm8l151x8和stm8l152x8 随着64-KB闪存微控制器(相同的外周设置为中等+) 高密度stm8l16xx设备:stm8l162x8微控制器与闪存(相同的外周设置为 64-KB高密度stm8l152设备加AES硬件加速器 目录 1中央处理单元(CPU)。30。 1.1引言30 1.2 CPU的寄存器。30。 1.2.1描述CPU寄存器。..。30 1.2.2STM8 CPU寄存器图。..。34 1.3全球配置寄存器(cfg_gcr)。34。 1.3.1激活水平。..。34

STM8L中文参考手册(4)-

STM8L中文参考手册(4)- 20 16位通用定时器(TIM2、TIM3、tim5) 20.1简介 本章介绍TIM2、TIM3和tim5是相同的定时器 每个定时器包括一个由可编程分频器驱动的16位上下自动重载计数器它可以用于多种目的,包括:●定时产生●测量输入信号的脉冲长度(输入捕获) ●产生输出波形(输出比较、脉宽调制和脉冲模式)●各种中断能力事件(捕获、比较、溢出) ●与其他定时器或外部信号(外部时钟、复位、触发使能)同步 定时器时钟可以来自内部时钟,也可以来自配置寄存器或外部源本章仅介绍通用定时器的主要特性。它参考了与19:16高级控制定时器(TIM1)相对应的部分中的每个功能的更详细的信息页28320.2 TIMx 主要功能 通用TIMx TIM2/TIM3功能包括: ●16位向上、向下、向上/向下自动刷新计数器●3位可编程分频器允许将计数器的时钟频率分成1至128的任意2次方两个独立的低电平通道:输入捕获输出比较 脉冲宽度调制产生(边沿对齐)-一个脉冲输出模式 低电平中断输入,用于复位定时器输出信号,或处于已知状态●输入捕捉2可通过来自comp2比较器 :

更新的中断和DMA请求产生以下事件:当计数器溢出时,计数器初始化(软件)输入捕捉输出比较中断输入 触发事件(开始、停止、内部/外部触发初始化或计数) 20.3.1时间单元 定时器时基单元包括:●16位可逆计数器 时钟源是内部时钟(fsysclk)它由预分频器计数器的时钟ck_cnt驱动,预分频器计数器直接连接到ck_psc时钟馈送 分频器 分频器的实现如下:7位计数器(在timx_pscr寄存器中)由基于 低预分频器的3位寄存器控制它可以控制飞行中寄存器缓冲区的变化。它可以将计数器的时钟频率转换为1、2、4、8、16、32、64或128计数器的时钟频率计算如下: fCk _ CNT = fck _ PSC/2(PSCR[2:0)计数器操作 请参考第19.3.4页:上部288,模式部分19.3.5:在第290页向下计数,模式19.3.6:中心对齐(向上/向下计数)29220.3.2时钟/触发控制器 参见第296页第19.4节:TIM1时钟/触发控制器20.3.3采集/比较通道输入级 参见第310页第19.5节:TIM1采集/比较通道 有两个输入通道,如图122:输入级框图通道2内部连接到比较器

stm8l中文参考手册(下)

手动开关 手动开关没有自动切换为直接的但它提供给用户的切换事件时间的精确控制。参照图20中的流程图。 1。写使用系统时钟开关选择目标时钟源的8位值寄存器(clk_swr)。然后swbsy位是由硬件,和目标源振荡器开始。古老的时钟源继续驱动CPU和外设。 2。该软件具有等到目标时钟源准备(稳定的)。这是在clk_swcr寄存器和快捷旗由中断如果swien位设置显示。 3。最终软件的作用是设置,在所选择的时间,在clk_swcr的赛文点寄存器来执行开关。在手动和自动切换模式,旧的系统时钟源不会自动关闭的情况下是由其他模块(LSI混凝土可用于例如独立的看门狗驱动)。时钟源可以关机使用在内部时钟寄存器的位(clk_ickcr)和外部时钟寄存器(clk_eckcr)。如果时钟开关不因任何原因的工作,软件可以通过清除swbsy 标志复位电流开关操作。这将恢复clk_swr注册到其以前的内容(旧的系统时钟)。注意:在清理swbsy标志具有复位时钟主开关的程序,应用程序必须等到后产生新的主时钟切换请求之前有一段至少两个时钟周期。

9.7周门控时钟(PCG) 外周时钟门控(PCG)模式选择性地启用或禁用系统时钟(SYSCLK)连接到外围设备在运行或慢速模式的任何时间来优化功耗。 设备复位后,所有的外设时钟被禁用。唯一的一点是在复位状态是默认启用pcken27因为它用于启动。软件已被正确地写入关掉ROM Bootloader执行后的时钟。 您可以启用时钟的任何外围设置在clk_pckenrx周围门控时钟寄存器的相应pcken点。 ●使周围,首先使在clk_pckenr相应的pcken点 寄存器然后设置使点周围的外围控制寄存器。 ●禁用适当的外围,先禁用在周边的适当位 控制寄存器,然后停止相应的时钟。

stm8L051F3

This is information on a product in full production. March 2014 DocID023465 Rev 21/93 STM8L051F3 Value Line, 8-bit ultralow power MCU, 8-KB Flash, 256-byte data EEPROM, RTC, timers, USART, I2C, SPI, ADC Datasheet production data Features ?Operating conditions –Operating power supply: 1.8 V to 3.6 V Temperature range: ?40 °C to 85 °C ?Low power features – 5 low power modes: Wait, Low power run (5.1 μA), Low power wait (3 μA), Active-halt with RTC (1.3 μA), Halt (350 nA)–Ultra-low leakage per I/0: 50 nA –Fast wakeup from Halt: 5 μs ?Advanced STM8 core –Harvard architecture and 3-stage pipeline –Max freq: 16 MHz, 16 CISC MIPS peak –Up to 40 external interrupt sources ?Reset and supply management –Low power, ultra-safe BOR reset with 5 selectable thresholds –Ultra low power POR/PDR –Programmable voltage detector (PVD)?Clock management –32 kHz and 1 to 16 MHz crystal oscillators –Internal 16 MHz factory-trimmed RC –Internal 38 kHz low consumption RC –Clock security system ?Low power RTC –BCD calendar with alarm interrupt –Digital calibration with +/- 0.5 ppm accuracy –LSE security system –Auto-wakeup from Halt w/ periodic interrupt ?Memories –8 Kbytes of Flash program memory and 256 bytes of data EEPROM with ECC –Flexible write and read protection modes – 1 Kbyte of RAM ?DMA – 4 channels supporting ADC, SPI, I2C, USART, timers – 1 channel for memory-to-memory ?12-bit ADC up to 1 Msps/28 channels –Internal reference voltage ?Timers –Two 16-bit timers with 2 channels (used as IC, OC, PWM), quadrature encoder –One 8-bit timer with 7-bit prescaler – 2 watchdogs: 1 Window, 1 Independent –Beeper timer with 1, 2 or 4 kHz frequencies ?Communication interfaces –Synchronous serial interface (SPI)–Fast I 2C 400 kHz SMBus and PMBus –USART ?Up to 18 I/Os, all mappable on interrupt vectors ?Development support –Fast on-chip programming and non-intrusive debugging with SWIM –Bootloader using USART https://www.wendangku.net/doc/fa10404751.html,

STM8L入门手册

STM8L单片机入门手册 注:本教程以STM8L052R8和IAR开发环境为例1、IAR环境安装与注意事项: 安装时按照一般软件安装即可,提示需要输入License时请使用IAR kegen PartC软件进行破解,注意Product选择STM8项,如下图示: 另外:机器上本身安装过MSP430平台的IAR环境,安装STM8平台的IAR是可以兼容的

2、IAR环境创建STM8工程: 2.1、创建工程 如下图示,打开IAR环境for STM8 选择project->Create New Project,选择C语言开发,点击“OK” 选择保存路径后输入工程名点击“保存”即可。

按上图示,添加文件分组,并命名“SRC”和“Lib”,类似方法在分组中添加文件。 2.2工程重要设置: 右击工程名,选择“Options…” 在General Options项中,Target选项卡中按照下图设置: 在C/C++ Compiler项中,Preprocessor选项卡中添加头文件路径,如下图示:

红色圈内容直接输入(不能选???) $PROJ_DIR$\..\Lib\inc 解释:$PROJ_DIR$->表示当前工程目录(.eww文件所在目录); ..->表示上层目录; 在Debugger项中,设置仿真调试器与入口函数,如下图示:

main 上图中,Run to:写main 这里是设置入口函数2.3设置生成HEX文件: 右击工程名,选择“Options…”

该设置不会影响调试器在线仿真功能,可以一直勾选上,这点和MSP430不同。 3、IAR环境常见问题及解决方法 3.1、Couldn’t go to ‘M52Li’ 进入调试模式是会有下图警告,并且不能调试 找不到入口函数,入口函数应该是main 3.2、“The debugging session could not be started.” 由于脱机烧录或者其他原因写了保护,造成连接不上目标板。 解决方法: 打开STVP软件,点击读取按钮,会出现以下报错: 此时,进入到OPTION BYTE页面,将ROP写为OFF模式,如下图示

STM8L05X入门学习笔记

1、工程新建 首先新建文件夹,在文件夹下建立四个文件(这个看个人喜好),我喜欢建立一个工程文件夹Project用于存放工程文件,Library文件用于存放库文件,App用于存放用户程序,Doc 用于存放说明文档,如图1所示。 图1 二:将官方的库文件Libraries文件下STM8S_StdPeriph_Driver这个文件下的内容复制到自己新建的Library文件下,把官方Project文件下Template文件夹下main.c stm8s_conf.h stm8s_it.c 和stm8s_it.h复制到App文件夹下。如图2,图3。 图2 图3 三:打开IAR 选择Project-> Create New Project –>ok,将文件保存到Project下,

这时工程已经建好,右击工程选择Add Group,然后依次添加文件App,Libraries,Doc,BSP_CFG 配置好如图所示 四:给工程下APP添加App文件下的文件如图

给Libraries添加Library文件下src文件下的所有文件、 五配置Options,包括如下,1选择型号这里选STM8S903K3 2C++选项卡配置路经,和型号的宏定义。

六编译工程,这事会提醒对工程的保存,进行保存即可,这时会发现很多错误,这是因为这个库包含了所有的型号,有些这个单片机没有,将它移除即可。再次编译就会发现没有错误了。 7HEX文件输出

2、系统时钟 四种不同的时钟源可以用来驱动系统时钟: ●16 MHz 高速内部(HSI)工厂调整RC 时钟 ●1 到16 MHz 高速外(HSE)振荡器时钟 ●32.768 千赫低速外(LSE)振荡器时钟 ●38 千赫低速内部(LSI)低功耗时钟 每个时钟源可以开启或关闭独立不使用时的功耗,优化。 这四个时钟可以用一个可编程分频器(因素1 至128)驱动 系统时钟(系统时钟)。该系统时钟用于时钟的核心,内存和外设。复位后,该设备重新启动与HSI 时钟除以8 的违约。该分频器分频比时钟源可以改变应用程序尽快执行代码起点。

stm8L 数据手册

October 2010Doc ID 15275 Rev 111/81 STM8L101xx 8-bit ultralow power microcontroller with up to 8 Kbytes Flash, multifunction timers, comparators, USART , SPI, I2C Features ■ Main microcontroller features –Supply voltage range 1.65 V to 3.6 V –Low power consumption (Halt: 0.3μA, Active-halt: 0.8μA, Dynamic Run: 150μA/MHz) –STM8 Core with up to 16 CISC MIPS throughput –Temp. range: -40 to 85°C and 125 °C ■ Memories –Up to 8 Kbytes of Flash program including up to 2 Kbytes of data EEPROM –Error correction code (ECC) –Flexible write and read protection modes –In-application and in-circuit programming –Data EEPROM capability – 1.5 Kbytes of static RAM ■ Clock management –Internal 16 MHz RC with fast wakeup time (typ. 4μs) –Internal low consumption 38kHz RC driving both the IWDG and the AWU ■ Reset and supply management –Ultralow power, ultrasafe power-on-reset /power down reset –Three low power modes: Wait, Active-halt, Halt ■ Interrupt management –Nested interrupt controller with software priority control –Up to 29 external interrupt sources ■ I/Os –Up to 30 I/Os, all mappable on external interrupt vectors –I/Os with prog. input pull-ups, high sink/source capability and one LED driver infrared output ■ Peripherals –Two 16-bit general purpose timers (TIM2 and TIM3) with up and down counter and 2 channels (used as IC, OC, PWM) –One 8-bit timer (TIM4) with 7-bit prescaler –Infrared remote control (IR)–Independent watchdog –Auto-wakeup unit –Beeper timer with 1, 2 or 4 kHz frequencies –SPI synchronous serial interface –Fast I2C Multimaster/slave 400 kHz –USART with fractional baud rate generator – 2 comparators with 4 inputs each ■Development support –Hardware single wire interface module (SWIM) for fast on-chip programming and non intrusive debugging –In-circuit emulation (ICE)■ 96-bit unique ID Table 1. Device summary Reference Part number STM8L101xx STM8L101F1, STM8L101F2, STM8L101F3, STM8L101G2, STM8L101G3STM8L101K3 https://www.wendangku.net/doc/fa10404751.html,

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