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SD卡MiniSD卡与MicroSD卡的引脚定义等资料

December 2007 Rev 31/61

512 MByte and 1 GByte, 3.3V Supply Secure Digital? Card

Features

■SD Memory Card Specification Version 1.01-compliant

■Up to 1 Gbyte of Formatted Data Storage ■

Bus Mode

–SD Protocol (1 to 4 Data Lines)–SPI Protocol

■

Operating Voltage Range:

–Basic Communication (CMD0, CMD15, CMD55 and ACMD41): 2.0V to 3.6V

–Other C ommands a nd M emory A ccess: 2.7V to 3.6V ■Variable Clock Rate: 0 to 25 MHz ■Read Access (using 4 Data Lines)–Sustained Multiple Block: 6.3 Mb/s ■Write Access (using 4 Data Lines)–Sustained Multiple Block: 3.0 Mb/s ■Maximum Data Rate with up to 10 Cards ■Aimed at Portable and Stationary Applications ■

Communication Channel Protocol Attributes:–Six-wire communication channel (clock, command, 4 data lines)–Error-proof data transfer

–Single or Multiple block oriented data transfer

■Memory Field Error Correction ■Safe Card Removal during Read

■Write Protect Feature using Mechanical Switch ■Built-in Write Protection Features (Permanent and Temporary)

■

SD, MiniSD and MicroSD Packages –ECOPACK ? compliant –Halogen free –Antimony free

MicroSD

Table 1.

Device summary

Part Number Package Form Factor Operating Voltage Range

SMS128AF SD (full size)

2.7V to

3.6V

SMS256AF SMS512AF SMS01GAF SMS064BF MiniSD SMS128BF SMS064FF MicroSD

SMS128FF SMS256FF SMS512FF

https://www.wendangku.net/doc/ff15381454.html,

Contents SMSxxxAF, SMSxxxFF, SMSxxxBF

Contents

1Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2Memory array partitioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3Secure digital memory card interface . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1Secure digital memory card bus topology . . . . . . . . . . . . . . . . . . . . . . . . 15

3.2SD bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.3SD Memory Card Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.4Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.4.1Card Identification Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.4.2Data Transfer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.5Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.6Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4SD memory card hardware interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.1SD memory card bus circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.2Power-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

4.3Hot Insertion/Removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

4.4Power Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

4.5Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5Card registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

5.1OCR Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

5.2CID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3CSD Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

5.4RCA Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.5DSR Register (Optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.6SCR Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.1Command and Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.1.1Card Identification and Operating Conditions Timings . . . . . . . . . . . . . 35

6.1.2Card Relative Address Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

SMSxxxAF, SMSxxxFF, SMSxxxBF Contents

6.1.3Data Transfer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

6.1.4Last Card Response, Next Host Command Timings . . . . . . . . . . . . . . . 36

6.1.5Last Host Command, Next Host Command Timings . . . . . . . . . . . . . . . 37

6.2Data Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.2.1Single Block Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.2.2Multiple Block Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.3Data Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

6.3.1Single Block Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

6.3.2Multiple Block Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

6.4STOP_TRANSMISSION Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

6.4.1Erase, Set and Clear Write Protect Timings . . . . . . . . . . . . . . . . . . . . . 41

6.4.2Re-selecting a busy card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6.5Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

7Serial peripheral interface (SPI) mode . . . . . . . . . . . . . . . . . . . . . . . . . 42

7.1SPI bus topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

7.2SPI Bus Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

7.2.1Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

7.2.2Bus Transfer Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

7.2.3Data Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

7.2.4Data Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

7.2.5Erase & Write Protect Management . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

7.2.6Read CID/CSD Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

7.2.7Reset Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

7.2.8Memory Array Partitioning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

7.2.9Card Lock/Unlock Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

7.2.10Application Specific Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

7.3SPI Mode Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

7.4Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

7.4.1R1 Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

7.4.2R1b Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

7.4.3R2 Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

7.4.4R3 Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

7.5Clearing Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

7.6SPI Bus Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

7.6.1Data Read Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Contents SMSxxxAF, SMSxxxFF, SMSxxxBF

7.6.2Data Write Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 8Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 9Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Appendix A Power supply decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 10Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

SMSxxxAF, SMSxxxFF, SMSxxxBF List of tables List of tables

Table 1.Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2.System performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3.Power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4.Environmental specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 5.Physical dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6.System reliability and maintenance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 7.Memory array structures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 8.Full-size SD Memory Card pin assignment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 9.MicroSD Contact Pad Assignment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 10.Card States vs. Operation Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 11.SD Card Command Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 12.Response R1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 13.Response R2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 14.Response R3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 15.Response R6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 16.Bus Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 17.Bus Signal Condition - I/O Signal Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 18.Bus Timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 19.SD Memory Card Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 20.OCR Register Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 21.CID Fields. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 22.CSD Fields Compatible with CSD Structure V1 / MM Card Specification V2.11 . . . . . . . . 33 Table 23.SCR Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 24.Timing Diagram Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 25.Timing Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table https://www.wendangku.net/doc/ff15381454.html,mand Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table https://www.wendangku.net/doc/ff15381454.html,mand Classes in SPI Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 28.SPI Timing Symbols. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 29.SPI Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 30.Full-Size Secure Digital Memory Card Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 31.MiniSD package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 32.MicroSD package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 33.Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 34.Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

List of figures SMSxxxAF, SMSxxxFF, SMSxxxBF List of figures

Figure 1.Write Protection hierarchy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 2.Full size Secure Digital Memory Card form factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 3.MicroSD pin assignment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 4.Secure Digital Memory Card system bus topology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 5."No Response" and "No Data" operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 6.(Multiple) Block Read operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 7.(Multiple) Block Write operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure https://www.wendangku.net/doc/ff15381454.html,mand Token format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 9.response token format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 10.Data Packet format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 11.SD Memory Card State Diagram (Card Identification Mode) . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 12.SD Memory Card State Diagram (Data Transfer Mode). . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 13.Full Size SD Memory Card Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 14.Power-Up Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 15.Bus Signal levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 16.Data Input/Output Timings Referenced to Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 17.Identification Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 18.SEND_RELATIVE_ADDRESS Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 19.Response (Data Transfer Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 20.Response End To Next CMD Start (Data Transfer Mode) . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure https://www.wendangku.net/doc/ff15381454.html,mand Sequence (All Modes). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 22.Single Block Read Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 23.Multiple Block Read Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 24.STOP_TRANSMISSION Command (CMD12, Data Transfer Mode) . . . . . . . . . . . . . . . . . 38 Figure 25.Block Write Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 26.Multiple Block Write Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 27.STOP_TRANSMISSION During Data Transfer From The Host. . . . . . . . . . . . . . . . . . . . . 40 Figure 28.STOP_TRANSMISSION During CRC Status Transfer From Card. . . . . . . . . . . . . . . . . . . 40 Figure 29.STOP_TRANSMISSION Received After Last Data Block with Card Busy . Programming40 Figure 30.STOP_TRANSMISSION Received After Last Data Block with Card Idle. . . . . . . . . . . . . . 41 Figure 31.SD Memory Card System SPI Mode Bus Topology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 32.Read Operation Mechanism. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 33.Multiple Block Read Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 34.Read Data Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 35.Write Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 36.Erase & Write Protect Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 37.Host Command to Card Response - Card is Ready. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure 38.Host Command to Card Response - Card is Busy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure 39.Card Response to Host Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Figure 40.Single Block Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Figure 41.STOP_TRANSMISSION between Blocks During Multiple Block Read . . . . . . . . . . . . . . . 50 Figure 42.STOP_TRANSMISSION within a Block During Multiple Block Read . . . . . . . . . . . . . . . . 51 Figure 43.CSD Register Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Figure 44.Single Block Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Figure 45.Multiple Block Write Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Figure 46.Full-Size Secure Digital Memory Card Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Figure 47.mini Secure Digital Card Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 48.MicroSD card mechanical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

SMSxxxAF, SMSxxxFF, SMSxxxBF List of figures Figure 49.Power supply decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Description SMSxxxAF, SMSxxxFF, SMSxxxBF

1 Description

The Secure Digital Memory Card (SD Memory Card) is a Flash-Based Memory Card. It is specifically designed to meet the security, capacity, performance and environmental

requirements of the latest-generation audio and video consumer electronic devices, that is mobile phones, digital cameras, digital recorders, PDAs, organizers, electronic toys, etc. The Secure Digital Memory Card is a high-mobility, high-performance, low-cost and low-power consumption device that features high data throughput at the memory card interface. It includes a copyright protection mechanism that complies with the security of the SDMI (Secure Digital Music Initiative) standard. The Secure Digital Memory Card security system uses mutual authentication and a “cipher algorithm” that protects the card from illegal use. Unsecured access to the user's personal content is also available.

The Secure Digital Memory Cards have an advanced communication interface designed to operate in a low voltage range. The full-size Secure Digital Memory Card has a 9-pin interface whereas the Mini Secure Digital Memory Card has a 11-pin interface but can be fitted with a 9-pin adapter. Only the 9-pin interface is described in this document. The MicroSD Memory Card has an 8-pin interface, and can also be fitted with a 9-pin adapter.Table 2,T able 3,Table 4,Table 5, and Table 6 give an overview of the Secure Digital Memory Card features.

In order to meet environmental requirements, the devices are offered in ECOPACK ?

packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.

The SD, MiniSD and MicroSD packages are also Halogen free and Antimony free.

Related documentation

●Secure Digital Memory Card Specifications: Part 1 Physical Layer Specification, Version 1.01

●MiniSd Memory Card Specifications: Addendum to SD Memory Card Specifications Part 1 Physical layer Specification, Version 1.02

●

MicroSD Memory Card Specifications: Addendum to SD Memory Card Specifications Part 1, Physical Layer Specification, Version 1.00

Table 2.

System performance

Max.Typ.

Unit Sleep to Ready

μs Sustained Multiple Block Read (1)1.43X, 20X, 12X and 5X Speed grade markings where 1X = 150 KBytes/s.

6.3 (43X)MBytes/s Burst Single Block Read (1) 1.8 (12X)MBytes/s Sustained Multiple Block Write (1) 3.0 (20X)MBytes/s Burst Single Block Write (1)0.8 (5X)

MBytes/s Power-up to Ready

150

SMSxxxAF, SMSxxxFF, SMSxxxBF

Description

Table 3.

Power consumption (1)

1.T A = 25°C, V DD = 3.6V.

Mode

Max. Current Consumption

Standby 200 μA Read 30 mA Write

30 mA

Table 4.

Environmental specifications (1)

1.NA = Not Applicable; RH = Relative Humidity; ESD = ElectroStatic Discharge

Environmental specifications Operating Non-Operating T emperature

? 25°C to 85°C ? 40°C to 85°C Humidity (non- condensing)

NA 85°C - 85%RH

ESD

Protection

Contact Pads

±4kV , Human body model according to ANSI EOS/ESD-S5.1-1998

Other

±8kV (coupling plane discharge)

±15kV (air discharge) Human body model per

IEC61000-4-2Salt Water Spray NA T A = 35 °C 3% NaCl (MIL Std Method 1009)

Vibration (peak-to-peak)NA 15 Gmax Shock

1,000G Drop NA

2000G

Bending

20N (middle of the card)20N (border of the card)UV light exposure

254nm, 15Ws/cm2

Table 5.

Physical dimensions

Parameter SD MiniSD MicroSD Unit Width 2420 11

Height

21.5

15 mm Thickness 2.1 1.4

Inter Connect Area 0.7±0.1

Max. Card Thickness 0.95 Max. Pull Area

1.0±0.1

Weight Approx. 2

Approx. 1

<1g Number of Pins

N/A

Description

SMSxxxAF, SMSxxxFF, SMSxxxBF

Table 6.

System reliability and maintenance

MTBF (1)

1.MTBF = Mean Time Between Failures.

>1,000,000hrs

Preventive Maintenance None

Data Reliability 1 non-recoverable bit in 1014 bit read Endurance

>2,000,000 Program/Erase Cycles

SMSxxxAF, SMSxxxFF, SMSxxxBF Memory array partitioning

2 Memory array partitioning

The basic unit of data transfer to/from the SD Memory Card is the Byte. The memory array is divided into several structures as described below and summarized in Table 17.

Block

The Block is the unit structure related to block-oriented read and write commands. Its size is the number of Bytes that are transferred when a block-oriented read or write command is sent by the host. The SD Memory Card Block size is either programmable or fixed. The information about allowed block sizes and programmability is stored in the CSD Register. The details of the Memory Array Structure and the number of addressable Blocks are shown in T able 17.

Sector

The sector is the unit structure related to the erase commands. Its size is the number of blocks that are erased at any one time. The sector size is fixed for each device. The information about the sector size (in blocks) is stored in the CSD register.

Write Protect Group (WP-Group)

The WP-Group is the smallest structure that may be individually protected. Its size is the number of Sectors that are Write Protected with one bit. The information about the Write Protect Group size is stored in the CSD Register.Table 7.

Memory array structures

Type of Structure Number of structures in device

Unit 32 MByte Devices 64 MByte Devices 128 MByte Devices 256 MByte Devices 512 MByte Devices 1 GByte Devices Blocks 512 Bytes 5977612262424832049971210024961999872Sector Block 128128128128128128WP-Groups

Sector

Memory array partitioning SMSxxxAF, SMSxxxFF, SMSxxxBF

SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface

3 Secure digital memory card interface

This section applies to the full-size SD Memory Card only, or to the MiniSD and MicroSD card when used with an adapter.

Details on the 11-pin communication interface of the MiniSD card used without an adapter are still to be announced. Figure 3: MicroSD pin assignment shows the MicroSD pinout.The Secure Digital Memory Card has an advanced 9-pin communication interface (Clock, Command, 4 Data pins and 3 Power Supply pins) designed to operate in a low voltage range. The Secure Digital Card has its nine pins exposed on one side (see Figure 2). The signal/pin assignments are listed in Table 8 The pin types are Power Supply, Input, Output and Push-Pull. The signals include six communication lines CMD, DAT0, DAT1, DAT2, DAT3, CLK and three supply lines V DD , V SS1 and V SS2.

Table 8.

Full-size SD Memory Card pin assignment

Pin #

SD mode

SPI mode

Name

Type (1)1.S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers.

Description

Name Type Description

1CD/DA T3(2)

2.The extended DAT lines (DAT1-DAT3) are input on power-up. They start to operate as DAT lines after SET_BUS_WIDTH

command.I/O/PP (3)

3.After power-up this line is input with 50kW pull-up (can be used for card detection or SPI mode selection). The pull-up

should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command.

Card Detect / Data Line [Bit 3]CS I Chip Select (active Low)2CMD PP Command/Response DI I Data In

3V SS1S Supply voltage ground V SS S Supply voltage ground 4V DD S Supply voltage V DD S Supply voltage 5CLK I Clock

SCLK I Clock

6V SS2S Supply voltage ground V SS2S

Supply voltage ground

7DA T0I/O/PP Data Line [Bit 0]DO

O/PP Data Out

8DA T1(2)I/O/PP Data Line [Bit 1]Reserved 9

DA T2(2)

I/O/PP

Data Line [Bit 2]

Reserved

Secure digital memory card interface

SMSxxxAF, SMSxxxFF, SMSxxxBF

Table 9.

MicroSD Contact Pad Assignment

Pin SD Mode

SPI Mode

Name Type (1)1.S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers.

Description Name Type

Description

1 DA T

2 I/O/PP Data Line [Bit 2] RSV Reserved

CD/DA T3(2)

2.The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after SET_BUS_WIDTH command. The Host shall keep its own DAT1-DAT3 lines in input mode, as well, while they are not used. It is defined so, in order to keep compatibility to MultiMediaCards.I/O/PP (3)

3.After power up this line is input with 50KOhm pull-up (can be used for card detection or SPI mode

selection). The pull-up should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command.

Card Detect / Data Line

[Bit 3]

Chip Select (neg true)

3 CMD PP Command/Response DI I Data In

4 V DD

S Supply voltage

V DD S Supply voltage 5 CLK I Clock SCLK I Clock 6 V SS

Supply voltage ground

V SS S

Supply voltage ground

7 DA T0 I/O/PP Data Line [it 0] DO

O/PP Data Out

8 DA T1

RSV

Reserved

SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface

3.1 Secure digital memory card bus topology

The Secure Digital Memory Card system defines two alternative communications protocols:

SD and SPI that correspond to two operating modes.

Either mode can be selected in the application, mode selection is transparent to the host.

The host automatically detects the operating mode of the card by issuing the Reset

command (refer to Section7.2.1: Mode Selection) and will expect all further

communications to use the same mode. Therefore, applications that use only one

communication mode do not have to be aware of the other.

The SD bus includes the following signals:

●CLK: Host to card clock signal

●CMD: Bi-directional Command/Response signal

●DAT0 - DAT3: 4 Bi-directional data signals.

●V DD, V SS1, V SS2: Power and ground signals.

The SD Memory Card bus has a synchronous star topology (refer to Figure4: Secure Digital

Memory Card system bus topology) with a single master (the application) and multiple

slaves (the cards). The Clock, power and ground signals are common to all cards. The

command (CMD) and data (DAT0 - DAT3) signals are dedicated to the cards, they provide

continuous point-to-point connection to all the cards.

During the initialization process, commands are sent to each card individually, allowing the

application to detect the cards and assign logical addresses to the physical slots. Data is

always sent (received) to (from) each card individually. However, in order to simplify the

handling of the card stack, after the initialization process, all commands may be sent

concurrently to all cards. Addressing information is provided in the command packet.

The SD bus allows dynamic configuration of the number of data lines. After power-up the SD

Memory Card defaults to using only DAT0 for data transfer. After initialization the host can

change the bus width (number of active data lines). This feature is an easy trade off between

hardware cost and system performance.

Secure digital memory card interface

SMSxxxAF, SMSxxxFF, SMSxxxBF

1.DAT1 and DAT2 not connected.

3.2 SD bus protocol

Communication over the SD bus is based on command and data bit streams which are

initiated by a start bit and terminated by a stop bit.

●

Command: a command is a token which starts an operation. A command is sent from the host either to a single card (addressed command) or to all connected cards (broadcast command). Commands are transferred serially on the CMD line. See Figure 5: "No Response" and "No Data" operations .The Command token format is shown in Figure 8

●

Response: a response is a token which is sent from an addressed card, or

(simultaneously) from all connected cards, to the host, as an answer to a previously received command. Responses are transferred serially on the CMD line. A response is illustrated in Figure 5: "No Response" and "No Data" operations .The Response token format is shown in Figure 9

●

Data: data can be transferred from the card to the host or from the host to the card. Data is transferred via the data lines. See Figure 6: (Multiple) Block Read operation for an illustration.

The Data Packet format is shown in Figure 10

Card addressing is implemented using a session address assigned to the card during the initialization phase (See SD Memory Card Specification, Chapter 4). The basic transaction on the SD bus is the command/response transaction. In this type of bus transactions, the information is directly transferred within the command or response structure. In addition, some operations have a data token. Data transfers to/from the SD Memory Card are done in blocks. Data blocks are always followed by CRC bits.

Single and Multiple Block operations are supported. Note that the Multiple Block operation mode improves the speed of write operations. A Multiple Block transmission is terminated by issuing a STOP_TRANSMISSION command on the CMD line (See Figure 6 and Figure 7).

SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface Data transfer can be configured by the host to use single or multiple data lines (provided that

the card supports this feature).

A busy signal on DAT0 is used to indicate that a Block Write operation is ongoing (see

Figure7). The same busy signaling is used regardless of the number of data lines used to

transfer the data.

Response tokens (see Figure9) have four coding schemes depending on their content. The

token length is either 48 or 136 bits (See SD Memory Card Specification, Chapter 4.5 for

detailed definitions of the commands and responses). The CRC protection algorithm for

data block is a 16-bit CCITT polynomial (see SD Memory Card Specification, chapter 4.5).

On the CMD line, the MSB bit is transmitted first and the LSB bit last. When the wide bus

option is used, the data is transferred 4 bits at a time (refer to Figure10). Start bits, End bits

and CRC bits, are transmitted on all the DAT lines used. CRC bits are calculated and

checked for every DAT line individually. The CRC status response and Busy indication are

sent by the card to the host on DAT0 only (DAT1-DAT3 are Don’t Care).

Secure digital memory card interface SMSxxxAF, SMSxxxFF, SMSxxxBF

SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface

3.3 SD Memory Card Functional Description

All communications between the host and the cards are controlled by the host (master). The host sends commands of two types:

●Broadcast commands which are intended for all cards. Some of these commands require a response.

●

Addressed (point-to-point) commands that are sent to the addressed card and are followed by a response from the card.

3.4 Operation Modes

Figure 11 and Figure 12 show an overview of the command flow for the Card Identification

mode and the Data Transfer mode, respectively.

Table 10 shows the relationship between operation modes and card states. Each state in the SD Memory Card state diagram (see Figure 16 and Figure 17) is associated with one operation mode.

Table 10.

Card States vs. Operation Modes

Card state

Operation mode

Inactive State Inactive

Idle State Card Identification Mode

Ready State Identification State

Secure digital memory card interface

SMSxxxAF, SMSxxxFF, SMSxxxBF

3.4.1 Card Identification Mode

The host enters the Card Identification mode after reset and remains in this mode until it has

finished searching for new cards on the bus.

Cards enter the Card Identification mode after reset and remain in this mode until they receive the SEND_RCA command (CMD3) (or the SET_RCA command for MultiMediaCards).

While in Card Identification mode the host resets all the cards that are in Card Identification mode, validates the operation voltage range, identifies every card and asks them to publish their Relative Card Addresses (RCA). This operation is done separately for each card on its own CMD line. In this mode, all data communications use the command line (CMD) only.The host starts the card identification process at the identification clock rate f OD . The SD Memory Card has push-pull CMD line output drives.

Once the bus has been activated the host asks each card to send their valid operation conditions (ACMD41 preceded by APP_CMD - CMD55 with RCA=0000h).

The response to ACMD41 is the Operation Condition Register of the card. The same command is sent to all the new cards in the system. Incompatible cards are switched to Inactive State.

The host then issues the ALL_SEND_CID command (CMD2), to every card to get their unique card identification (CID) numbers. All unidentified cards (which are in Ready State) answer by sending their CID numbers (on the CMD line) and switch to the Identification State. Then the host issues a CMD3 (SEND_RELATIVE_ADDR) command to ask the cards to publish a relative card address (RCA). The RCA is shorter than the CID, and will be used to address the card (typically at a clock rate higher than f OD ) once this is in Data Transfer mode. Once the RCA is received the card state changes to Standby. At this point, the host may ask the card to publish another RCA number by sending another

SEND_RELATIVE_ADDR command to the card. The last published RCA is the actual RCA of the card.

The host repeats the identification process, that is the cycles with CMD2 and CMD3, for each card in the system. Once all the SD Memory Cards have been initialized, the host initializes the MultiMediaCards that are in the system (if any) by issuing CMD2 and CMD3 as explained in the MultiMediaCard specification. Note that in the SD system all the cards are connected separately so each MultiMediaCard has to be initialized individually.

Stand-by State Data Transfer Mode

T ransfer State Sending-data State Receive-data State Programming State Disconnect State

Table 10.

Card States vs. Operation Modes (continued)

Card state

Operation mode